seminaries/mzapo/lcd/mzapo_lcdip: add option to compile for ILI9481 LCD controller.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>

seminaries/mzapo/lcd/mzapo_lcdip/mzapo_lcdip.c

@@ -15,6 +15,10 @@
 
 #define _POSIX_C_SOURCE 200112L
 
+//#define HX8357_B
+//#define ILI9481
+
+
 #include <sys/mman.h>
 #include <stdlib.h>
 #include <stdio.h>
@@ -117,7 +121,76 @@ void parlcd_hx8357_init(unsigned char *parlcd_mem_base)
     parlcd_write_cmd(parlcd_mem_base, 0x1);
     parlcd_delay(30);
 
-#ifdef HX8357_B
+#if defined(ILI9481)
+// Configure ILI9481 display
+
+    parlcd_write_cmd(parlcd_mem_base, 0x11);
+    parlcd_delay(20);
+    parlcd_write_cmd(parlcd_mem_base, 0xD0);
+    parlcd_write_data(parlcd_mem_base, 0x07);
+    parlcd_write_data(parlcd_mem_base, 0x42);
+    parlcd_write_data(parlcd_mem_base, 0x18);
+
+    parlcd_write_cmd(parlcd_mem_base, 0xD1);
+    parlcd_write_data(parlcd_mem_base, 0x00);
+    parlcd_write_data(parlcd_mem_base, 0x07);
+    parlcd_write_data(parlcd_mem_base, 0x10);
+
+    parlcd_write_cmd(parlcd_mem_base, 0xD2);
+    parlcd_write_data(parlcd_mem_base, 0x01);
+    parlcd_write_data(parlcd_mem_base, 0x02);
+
+    parlcd_write_cmd(parlcd_mem_base, 0xC0);
+    parlcd_write_data(parlcd_mem_base, 0x10);
+    parlcd_write_data(parlcd_mem_base, 0x3B);
+    parlcd_write_data(parlcd_mem_base, 0x00);
+    parlcd_write_data(parlcd_mem_base, 0x02);
+    parlcd_write_data(parlcd_mem_base, 0x11);
+
+    parlcd_write_cmd(parlcd_mem_base, 0xC5);
+    parlcd_write_data(parlcd_mem_base, 0x03);
+
+    parlcd_write_cmd(parlcd_mem_base, 0xC8);
+    parlcd_write_data(parlcd_mem_base, 0x00);
+    parlcd_write_data(parlcd_mem_base, 0x32);
+    parlcd_write_data(parlcd_mem_base, 0x36);
+    parlcd_write_data(parlcd_mem_base, 0x45);
+    parlcd_write_data(parlcd_mem_base, 0x06);
+    parlcd_write_data(parlcd_mem_base, 0x16);
+    parlcd_write_data(parlcd_mem_base, 0x37);
+    parlcd_write_data(parlcd_mem_base, 0x75);
+    parlcd_write_data(parlcd_mem_base, 0x77);
+    parlcd_write_data(parlcd_mem_base, 0x54);
+    parlcd_write_data(parlcd_mem_base, 0x0C);
+    parlcd_write_data(parlcd_mem_base, 0x00);
+
+    parlcd_write_cmd(parlcd_mem_base, 0x36);
+    //parlcd_write_data(parlcd_mem_base, 0x0A);
+    parlcd_write_data(parlcd_mem_base, 0x28);
+
+    parlcd_write_cmd(parlcd_mem_base, 0x3A);
+    parlcd_write_data(parlcd_mem_base, 0x55);
+
+    //parlcd_write_cmd(parlcd_mem_base, 0x2A);
+    parlcd_write_cmd(parlcd_mem_base,  0x2B);
+    parlcd_write_data(parlcd_mem_base, 0x00);
+    parlcd_write_data(parlcd_mem_base, 0x00);
+    parlcd_write_data(parlcd_mem_base, 0x01);
+    parlcd_write_data(parlcd_mem_base, 0x3F);
+
+    //parlcd_write_cmd(parlcd_mem_base, 0x2B);
+    parlcd_write_cmd(parlcd_mem_base,  0x2A);
+    parlcd_write_data(parlcd_mem_base, 0x00);
+    parlcd_write_data(parlcd_mem_base, 0x00);
+    parlcd_write_data(parlcd_mem_base, 0x01);
+    parlcd_write_data(parlcd_mem_base, 0xDF);
+
+    parlcd_delay(120);
+    parlcd_write_cmd(parlcd_mem_base, 0x29);
+
+    parlcd_delay(25);
+
+#elif defined(HX8357_B)
 // Configure HX8357-B display
     parlcd_write_cmd(parlcd_mem_base, 0x11);
     parlcd_delay(20);