seminaries/qtrvsim/print-hex-to-uart: prepared RISC-V version of this task as well.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>

seminaries/qtrvsim/print-hex-to-uart/.gitignore

+*.o
+depend
+print-hex-to-uart
+input_val.in
+serial_port.ref
+serial_port.out

seminaries/qtrvsim/print-hex-to-uart/Makefile

+ARCH=riscv64-unknown-elf
+
+SOURCES = print-hex-to-uart.S
+TARGET_EXE = print-hex-to-uart
+
+CC=$(ARCH)-gcc
+CXX=$(ARCH)-g++
+AS=$(ARCH)-as
+LD=$(ARCH)-ld
+OBJCOPY=$(ARCH)-objcopy
+
+ARCHFLAGS += -mabi=ilp32
+ARCHFLAGS += -march=rv32i
+ARCHFLAGS += -fno-lto
+
+CFLAGS  += -ggdb -Os -Wall
+CXXFLAGS+= -ggdb -Os -Wall
+AFLAGS  += -ggdb
+LDFLAGS += -ggdb
+LDFLAGS += -nostartfiles
+LDFLAGS += -nostdlib
+LDFLAGS += -static
+#LDFLAGS += -specs=/opt/musl/riscv64-linux-gnu/lib/musl-gcc.specs
+
+CFLAGS  += $(ARCHFLAGS)
+CXXFLAGS+= $(ARCHFLAGS)
+AFLAGS  += $(ARCHFLAGS)
+LDFLAGS += $(ARCHFLAGS)
+
+OBJECTS += $(filter %.o,$(SOURCES:%.S=%.o))
+OBJECTS += $(filter %.o,$(SOURCES:%.c=%.o))
+OBJECTS += $(filter %.o,$(SOURCES:%.cpp=%.o))
+
+all : default
+
+.PHONY : default clean dep all run_test
+
+%.o:%.S
+	$(CC) -D__ASSEMBLY__ $(AFLAGS) -c $< -o $@
+
+%.o:%.c
+	$(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@
+
+%.o:%.cpp
+	$(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $<
+
+%.s:%.c
+	$(CC) $(CFLAGS) $(CPPFLAGS) -S $< -o $@
+
+#default : $(TARGET_EXE)
+default : run_test
+
+$(TARGET_EXE) : $(OBJECTS)
+	$(CC) $(LDFLAGS) $^ -o $@
+
+dep: depend
+
+depend: $(SOURCES) $(glob *.h)
+	echo '# autogenerated dependencies' > depend
+ifneq ($(filter %.S,$(SOURCES)),)
+	$(CC)  -D__ASSEMBLY__ $(AFLAGS) -w -E -M $(filter %.S,$(SOURCES)) \
+	  >> depend
+endif
+ifneq ($(filter %.c,$(SOURCES)),)
+	$(CC) $(CFLAGS) $(CPPFLAGS) -w -E -M $(filter %.c,$(SOURCES)) \
+	  >> depend
+endif
+ifneq ($(filter %.cpp,$(SOURCES)),)
+	$(CXX) $(CXXFLAGS) $(CPPFLAGS) -w -E -M $(filter %.cpp,$(SOURCES)) \
+	  >> depend
+endif
+
+clean:
+	rm -f *.o *.a $(OBJECTS) $(TARGET_EXE) depend input_val.in \
+		serial_port.ref serial_port.out
+
+#riscv64-unknown-elf-objdump --source fibo-hazards
+
+input_val:=$(shell echo $$RANDOM)
+
+run_test: $(TARGET_EXE)
+	printf "0x%08x\n" $(input_val) >input_val.in
+	printf "%08x\n" $(input_val) >serial_port.ref
+	qtrvsim_cli --pipelined \
+		--dump-cycles $< \
+		--load-range input_val,input_val.in \
+		--serout serial_port.out
+	diff -u serial_port.ref serial_port.out
+
+-include depend

seminaries/qtrvsim/print-hex-to-uart/print-hex-to-uart-template.S

+// print-hex-to-uart.S file template, rename and implement the algorithm
+// The task is to process random value value injected into input_val
+// unsigned integer variable and print corresponding hexadecimal value
+// terminated by line feed (LF, '\n', 0x0a) character to the serial
+// port (UART).
+
+// Test algorithm in qtrvsim_gui program.
+// Every CPU configuration conforming RISC-V architecture can be chosen.
+// Test script select pipelined configuration with hazard unit but without
+// cache.
+
+// Copy directory with the project to your repository to
+// the directory work/print-hex-to-uart
+// critical is location of the file work/print-hex-to-uart/print-hex-to-uart.S
+// which is checked by the scripts
+
+// The script loads number to print into input_val global variable
+// and the implemented algorithm converts it to series of 8 hexadecimal
+// digits finalized by LF ('\n', 0x0a) character. Lowercase digits a to f
+// are expected for nibbles within range 10 to 15.
+
+// Directives to make interesting windows visible
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
+
+
+// Serial port/terminal registers
+// There is mirror of this region at address 0xffff0000
+// to match QtSpim and Mars emulators
+
+.equ SERIAL_PORT_BASE,      0xffffc000 // base address of serial port region
+
+.equ SERP_RX_ST_REG,        0xffffc000 // Receiver status register
+.equ SERP_RX_ST_REG_o,          0x0000 // Offset of RX_ST_REG
+.equ SERP_RX_ST_REG_READY_m,       0x1 // Data byte is ready to be read
+.equ SERP_RX_ST_REG_IE_m,          0x2 // Enable Rx ready interrupt
+
+.equ SERP_RX_DATA_REG,      0xffffc004 // Received data byte in 8 LSB bits
+.equ SERP_RX_DATA_REG_o,        0x0004 // Offset of RX_DATA_REG
+
+.equ SERP_TX_ST_REG,        0xffffc008 // Transmitter status register
+.equ SERP_TX_ST_REG_o,          0x0008 // Offset of TX_ST_REG
+.equ SERP_TX_ST_REG_READY_m,       0x1 // Transmitter can accept next byte
+.equ SERP_TX_ST_REG_IE_m,          0x2 // Enable Tx ready interrupt
+
+.equ SERP_TX_DATA_REG,      0xffffc00c // Write word to send 8 LSB bits to terminal
+.equ SERP_TX_DATA_REG_o,        0x000c // Offset of TX_DATA_REG
+
+.option norelax
+
+.globl    input_val
+
+.text
+.globl _start
+
+_start:
+
+	la   a0, input_val
+	lw   a0, 0(a0) // number to print in hexadecimal to serial port
+
+//Insert your code there
+
+//Final infinite loop
+end_loop:
+	fence           // flush cache memory
+	ebreak          // stop the simulator
+	j end_loop
+	nop
+
+
+.data
+// .align    2 // not supported by QtRVSim yet
+
+input_val:
+	.word 0x12345678
+
+// Specify location to show in memory window
+#pragma qtrvsim focus memory input_val