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Commit 693c32da authored by Pavel Pisa's avatar Pavel Pisa
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qtrvsim/apo-sort: RISC-V version of the task to tune cache and program together.


Signed-off-by: default avatarPavel Pisa <pisa@cmp.felk.cvut.cz>
parent 4b5c825f
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*.o
depend
apo-sort
array_data.out
array_size.in
array_data.ref
ARCH=riscv64-unknown-elf
SOURCES = apo-sort.S
TARGET_EXE = apo-sort
CC=$(ARCH)-gcc
CXX=$(ARCH)-g++
AS=$(ARCH)-as
LD=$(ARCH)-ld
OBJCOPY=$(ARCH)-objcopy
ARCHFLAGS += -mabi=ilp32
ARCHFLAGS += -march=rv32i
ARCHFLAGS += -fno-lto
CFLAGS += -ggdb -Os -Wall
CXXFLAGS+= -ggdb -Os -Wall
AFLAGS += -ggdb
LDFLAGS += -ggdb
LDFLAGS += -nostartfiles
LDFLAGS += -nostdlib
LDFLAGS += -static
#LDFLAGS += -specs=/opt/musl/riscv64-linux-gnu/lib/musl-gcc.specs
CFLAGS += $(ARCHFLAGS)
CXXFLAGS+= $(ARCHFLAGS)
AFLAGS += $(ARCHFLAGS)
LDFLAGS += $(ARCHFLAGS)
OBJECTS += $(filter %.o,$(SOURCES:%.S=%.o))
OBJECTS += $(filter %.o,$(SOURCES:%.c=%.o))
OBJECTS += $(filter %.o,$(SOURCES:%.cpp=%.o))
all : default
.PHONY : default clean dep all run_test
%.o:%.S
$(CC) -D__ASSEMBLY__ $(AFLAGS) -c $< -o $@
%.o:%.c
$(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@
%.o:%.cpp
$(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $<
%.s:%.c
$(CC) $(CFLAGS) $(CPPFLAGS) -S $< -o $@
#default : $(TARGET_EXE)
default : run_test
$(TARGET_EXE) : $(OBJECTS)
$(CC) $(LDFLAGS) $^ -o $@
dep: depend
depend: $(SOURCES) $(glob *.h)
echo '# autogenerated dependencies' > depend
ifneq ($(filter %.S,$(SOURCES)),)
$(CC) -D__ASSEMBLY__ $(AFLAGS) -w -E -M $(filter %.S,$(SOURCES)) \
>> depend
endif
ifneq ($(filter %.c,$(SOURCES)),)
$(CC) $(CFLAGS) $(CPPFLAGS) -w -E -M $(filter %.c,$(SOURCES)) \
>> depend
endif
ifneq ($(filter %.cpp,$(SOURCES)),)
$(CXX) $(CXXFLAGS) $(CPPFLAGS) -w -E -M $(filter %.cpp,$(SOURCES)) \
>> depend
endif
clean:
rm -f *.o *.a $(OBJECTS) $(TARGET_EXE) depend array_data.out array_data.ref array_size.in
#riscv64-unknown-elf-objdump --source bubble-sort
ARRAY_DATA_IN_FILE=array_data.in
ARRAY_SIZE:=$(words $(shell cat $(ARRAY_DATA_IN_FILE)))
ARRAY_BYTES:=$(words $(shell seq 1 $(ARRAY_SIZE)) $(shell seq 1 $(ARRAY_SIZE)) $(shell seq 1 $(ARRAY_SIZE)) $(shell seq 1 $(ARRAY_SIZE)))
D_CACHE_PAR:=$(shell sed -n -e 's/^[a-z]*,[0-9]*,[0-9]*,[0-9]*,[a-z]*/&/p' d-cache.par)
ifeq ($(D_CACHE_PAR),)
$(error cache parameters cannot be parsed $(D_CACHE_PAR))
endif
D_CACHE_SIZE_OK:=$(shell echo $(D_CACHE_PAR) | \
sed -n -e 's/^[a-z]*,\([0-9]*\),\([0-9]*\),\([0-9]*\),[a-z]*/\1*\2*\3<=16/p' | bc)
ifneq ($(D_CACHE_SIZE_OK),1)
$(error cache parameters probably request too many words $(D_CACHE_PAR))
endif
run_test: $(TARGET_EXE) $(ARRAY_DATA_IN_FILE)
echo $(ARRAY_SIZE) >array_size.in
sort <array_data.in >array_data.ref
qtrvsim_cli --dump-cycles $< \
--dump-cache-stats \
--load-range array_size,array_size.in \
--load-range array_start,$(ARRAY_DATA_IN_FILE) \
--dump-range array_start,$(ARRAY_BYTES),array_data.out \
--d-cache "$(D_CACHE_PAR)" \
--read-time 10 \
--write-time 10 \
--burst-time 2
diff -u -B -b array_data.out array_data.ref
-include depend
// apo-sort.S file template, rename and implement the algorithm
// Test algorithm in qtrvsim_gui program
// Select the CPU core configuration with delay-slot
// This setups requires (for simplicity) one NOP instruction after
// each branch and jump instruction (more during lecture about pipelining)
// The code will be compiled and tested by external riscv64-unknown-elf-gcc
// compiler by teachers, you can try make in addition, but testing
// by internal assembler should be enough
// copy directory with the project to your repository to
// the directory work/apo-sort
// critical is location of the file work/apo-sort/apo-sort.S
// and cache parameters work/apo-sort/d-cache.par
// which is checked by the scripts
// The file d-cache.par specifies D cache parameters in the form
// <policy>,<#sets>,<#words in block>,<#ways>,<write method>
// The example is
// lru,1,1,1,wb
// The cache size is limited to 16 words maximum.
// Directives to make interesting windows visible
#pragma qtrvsim show registers
#pragma qtrvsim show memory
.option norelax
.globl array_size
.globl array_start
.text
.globl _start
_start:
la a0, array_start
la a1, array_size
lw a1, 0(a1) // number of elements in the array
//Insert your code there
//Final infinite loop
end_loop:
fence // flush cache memory
ebreak // stop the simulator
j end_loop
.data
// .align 2 // not supported by qtrvsim yet
array_size:
.word 15
array_start:
.word 5, 3, 4, 1, 15, 8, 9, 2, 10, 6, 11, 1, 6, 9, 12
// Specify location to show in memory window
#pragma qtrvsim focus memory array_size
0x00000022
0x00000055
0x00000060
0x12345678
0x12345676
0x00000012
0x00000008
0x000000ac
0x33333333
0x02000010
0x00008382
0x12375310
0x00012340
0x00020202
0x00028288
lru,1,1,1,wb
......@@ -79,7 +79,7 @@ ARRAY_DATA_IN_FILE=array_data.in
ARRAY_SIZE:=$(words $(shell cat $(ARRAY_DATA_IN_FILE)))
ARRAY_BYTES:=$(words $(shell seq 1 $(ARRAY_SIZE)) $(shell seq 1 $(ARRAY_SIZE)) $(shell seq 1 $(ARRAY_SIZE)) $(shell seq 1 $(ARRAY_SIZE)))
run_test: $(TARGET_EXE)
run_test: $(TARGET_EXE) $(ARRAY_DATA_IN_FILE)
echo $(ARRAY_SIZE) >array_size.in
sort <array_data.in >array_data.ref
qtrvsim_cli --dump-cycles $< \
......
......@@ -3,7 +3,7 @@
// Select the CPU core configuration with delay-slot
// This setups requires (for simplicity) one NOP instruction after
// each branch and jump instruction (more during lecture about pipelining)
// The code will be compiled and tested by external mips-elf-gcc
// The code will be compiled and tested by external riscv64-unknown-elf-gcc
// compiler by teachers, you can try make in addition, but testing
// by internal assembler should be enough
......
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