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CTU CAN FD IP Core
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Closed date
WIP: Resolve "Component for Quartus / Platform Designer (Qsys)"
!274
· created
Oct 25, 2019
by
Jaroslav Beran
Closed
0
updated
Oct 28, 2019
WIP: Resolve "Missing TX spinlock release leads to deadlock"
!275
· created
Oct 25, 2019
by
Jaroslav Beran
Closed
0
updated
Oct 28, 2019
WIP: Resolve "Component for Quartus / Platform Designer (Qsys)"
!271
· created
Oct 19, 2019
by
Pavel Pisa
Closed
0
updated
Oct 25, 2019
WIP: Resolve "Add driver doc to gitlab"
!260
· created
Oct 06, 2019
by
Ille, Ondrej, Ing.
Closed
0
updated
Oct 06, 2019
WIP: Resolve "Update Quartus CAN_Wrapper to match core after 194-protocol-control-rework."
!251
· created
Aug 03, 2019
by
Pavel Pisa
Closed
0
updated
Aug 03, 2019
WIP: Resolve "reduce log size"
!248
· created
Aug 03, 2019
by
Ille, Ondrej, Ing.
Closed
0
updated
Aug 03, 2019
WIP: Resolve "Feature test clock tolerance"
!137
· created
Aug 30, 2018
by
Ille, Ondrej, Ing.
Test maintenance
Release 2.1
Closed
0
updated
Aug 30, 2018
Resolve "TXBHCI is triggered on wrong state transitions"
!136
· created
Aug 30, 2018
by
Ille, Ondrej, Ing.
Closed
0
updated
Aug 30, 2018
Testing merge request
!74
· created
May 22, 2018
by
Martin Jeřábek
Closed
0
updated
May 22, 2018
Resolve "bad range for txt_buf_ptr in core_top & CANcomponents"
!55
· created
Apr 16, 2018
by
Martin Jeřábek
Merged
0
updated
Apr 16, 2018
WIP: Resolve "TX buffer into SRAM"
!4
· created
Dec 05, 2017
by
Ille, Ondrej, Ing.
FPGA resource optimization
Closed
0
updated
Dec 05, 2017
Add comment on txt buffer state change
!502
· created
May 08, 2024
by
Ille, Ondrej, Ing.
Merged
0
updated
May 08, 2024
src: Remove txtb_unlock as a part of txtb_hw_cmd record. Re-create the signal...
!501
· created
May 08, 2024
by
Ille, Ondrej, Ing.
Release 2.6
Merged
0
updated
May 08, 2024
registerMap.lyx: DOR (Data Overrun Flag) can be cleared by CDO Command
!500
· created
Apr 27, 2024
by
Michal Lenc
Merged
1
updated
May 08, 2024
ci: Do not copy the full regression results to avoid pages size overflow. Fix...
!499
· created
Dec 15, 2023
by
Ille, Ondrej, Ing.
Merged
0
updated
Dec 15, 2023
ci: Disable gate_simple CI run. Currently gates are not configured in...
!498
· created
Dec 15, 2023
by
Ille, Ondrej, Ing.
Merged
0
updated
Dec 15, 2023
test: Add Compliance tests with saturation of bit time parameters generated...
!497
· created
Dec 14, 2023
by
Ille, Ondrej, Ing.
Merged
0
updated
Dec 14, 2023
ci: Adjust path to SLF
!496
· created
Sep 28, 2023
by
Ille, Ondrej, Ing.
Merged
0
updated
Sep 28, 2023
src: Remove Functional coverage for Priority decoder cells. VCS does not...
!495
· created
Sep 08, 2023
by
Ille, Ondrej, Ing.
Merged
0
updated
Sep 28, 2023
Resolve "SYN warnings"
!494
· created
Feb 19, 2023
by
Ille, Ondrej, Ing.
Merged
0
updated
Feb 19, 2023
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