seminaries/qtrvsim/branchpred-1/.gitignore

+*.o
+*.srec
+depend
+branchpred-1
+

seminaries/qtrvsim/branchpred-1/Makefile

+ARCH=riscv64-unknown-elf
+#ARCH=riscv64-linux-gnu
+
+SOURCES = branchpred-1.S
+TARGET_EXE = branchpred-1
+
+SOURCES += branchpred-1.S
+LOADLIBES += -lc
+
+CC=$(ARCH)-gcc
+CXX=$(ARCH)-g++
+AS=$(ARCH)-as
+LD=$(ARCH)-ld
+OBJCOPY=$(ARCH)-objcopy
+
+ARCHFLAGS += -mabi=ilp32
+ARCHFLAGS += -march=rv32im
+ARCHFLAGS += -fno-lto
+
+#ARCHFLAGS += -mabi=lp64
+#ARCHFLAGS += -march=rv64imac
+
+CFLAGS  += -ggdb -Os -Wall
+CXXFLAGS+= -ggdb -Os -Wall
+AFLAGS  += -ggdb
+LDFLAGS += -ggdb
+LDFLAGS += -nostartfiles
+LDFLAGS += -nostdlib
+LDFLAGS += -static
+#LDFLAGS += -specs=/opt/musl/riscv64-linux-gnu/lib/musl-gcc.specs
+
+LOADLIBES += -lgcc
+
+CFLAGS  += $(ARCHFLAGS)
+CXXFLAGS+= $(ARCHFLAGS)
+AFLAGS  += $(ARCHFLAGS)
+LDFLAGS += $(ARCHFLAGS)
+
+OBJECTS += $(filter %.o,$(SOURCES:%.S=%.o))
+OBJECTS += $(filter %.o,$(SOURCES:%.c=%.o))
+OBJECTS += $(filter %.o,$(SOURCES:%.cpp=%.o))
+
+all : default
+
+.PHONY : default clean dep all run_test
+
+%.o:%.S
+	$(CC) -D__ASSEMBLY__ $(AFLAGS) -c $< -o $@
+
+%.o:%.c
+	$(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@
+
+%.o:%.cpp
+	$(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $<
+
+%.s:%.c
+	$(CC) $(CFLAGS) $(CPPFLAGS) -S $< -o $@
+
+default : $(TARGET_EXE)
+#default : run_test
+
+$(TARGET_EXE) : $(OBJECTS)
+	$(CC) $(LDFLAGS) $^ $(LOADLIBES) -o $@
+
+dep: depend
+
+depend: $(SOURCES) $(glob *.h)
+	echo '# autogenerated dependencies' > depend
+ifneq ($(filter %.S,$(SOURCES)),)
+	$(CC)  -D__ASSEMBLY__ $(AFLAGS) -w -E -M $(filter %.S,$(SOURCES)) \
+	  >> depend
+endif
+ifneq ($(filter %.c,$(SOURCES)),)
+	$(CC) $(CFLAGS) $(CPPFLAGS) -w -E -M $(filter %.c,$(SOURCES)) \
+	  >> depend
+endif
+ifneq ($(filter %.cpp,$(SOURCES)),)
+	$(CXX) $(CXXFLAGS) $(CPPFLAGS) -w -E -M $(filter %.cpp,$(SOURCES)) \
+	  >> depend
+endif
+
+clean:
+	rm -f *.o *.a $(OBJECTS) $(TARGET_EXE) depend
+
+run_test: $(TARGET_EXE)
+	qtrvsim_cli --pipelined \
+		--dump-cycles $< \
+		--serout serial_port.out
+
+#		--serin serial_port.in \
+
+-include depend

seminaries/qtrvsim/branchpred-1/branchpred-1.S

+.globl _start
+
+# i = s0, j = s1, c = s2, t0 = outer loop limits, t1 = inner loop limit, t3 - auxiliary variable
+# c = 0; for ( i = 0; i < 4; i++) for ( j = 0; i < 5; j++) c++;
+# c, i, j = 0; do { do { c++ } while(++j < 5) } while(i < 4);
+
+_start:
+  addi s2, zero, 0   # c = 0; total loop count 
+  addi t0, zero, 4   # t0 = 4; outer loop limit
+  addi t1, zero, 5   # t1 = 5; inner loop limit
+
+  addi s0, zero, 0   # i = 0; outer loop inc
+L1:
+  addi s1, zero, 0   # j = 0; inner loop inc
+L2:
+  addi s2, s2, 1     # c++;
+
+  addi s1, s1, 1     # j++;
+  slt  t3, s1, t1    # t3 = (s1 < t1) ? 1 : 0;
+  bne  t3, zero, L2
+  addi s0, s0, 1     # i++;
+  slt  t3, s0, t0    # t3 = (s0 < t0) ? 1 : 0;
+  bne  t3, zero, L1
+  ebreak

seminaries/qtrvsim/call-syscall/lec10-01-call4-clobber.S

+.globl  _start
+.option norelax
+
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
+#pragma qtrvsim show peripherals
+
+.equ SPILED_REG_LED_LINE,   0xffffc104 // 32 bit word mapped as output
+.equ STACK_INIT, 0x01230000 // The bottom of the stack, the stack grows down
+
+_start:
+
+main:
+	li      sp, STACK_INIT
+	li      s0, 0x12345678
+
+	addi    a0, zero, 2
+	addi    a1, zero, 3
+	addi    a2, zero, 4
+	addi    a3, zero, 5
+	jal     fun
+	add     s0, a0, zero
+
+	li      t0, SPILED_REG_LED_LINE
+	sw      s0, 0(t0)
+final:
+	ebreak
+	beq     zero, zero, final
+	nop
+
+// int fun(int g, h, i, j)
+// g→a0, h→a1, i→a2, j→a3, a0 – ret. val, sX – save, tX – temp, ra – ret. addr
+// return (g + h) – (i + j)
+fun:
+	add     t0, a0, a1
+	add     t1, a2, a3
+	// Clobbers caller guaranteed
+	// to be saved register s0
+	sub     s0, t0, t1
+	add     a0, s0, zero
+	ret     // jr ra
+
+#pragma qtrvsim focus memory STACK_INIT-4*8

seminaries/qtrvsim/call-syscall/lec10-02-call4-save.S

+.globl  _start
+.option norelax
+
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
+#pragma qtrvsim show peripherals
+
+.equ SPILED_REG_LED_LINE,   0xffffc104 // 32 bit word mapped as output
+.equ STACK_INIT, 0x01230000 // The bottom of the stack, the stack grows down
+
+_start:
+
+main:
+	li      sp, STACK_INIT
+	li      s0, 0x12345678
+
+	addi    a0, zero, 2
+	addi    a1, zero, 3
+	addi    a2, zero, 4
+	addi    a3, zero, 5
+	jal     fun
+	add     s0, a0, zero
+
+	li      t0, SPILED_REG_LED_LINE
+	sw      s0, 0(t0)
+final:
+	ebreak
+	beq     zero, zero, final
+	nop
+
+// int fun(int g, h, i, j)
+// g→a0, h→a1, i→a2, j→a3, a0 – ret. val, sX – save, tX – temp, ra – ret. addr
+// return (g + h) – (i + j)
+fun:
+	addi    sp, sp, -4    // allocate space on stack
+	sw      s0, 0(sp)     // save s0 on stack
+	add     t0, a0, a1
+	add     t0, a0, a1
+	add     t1, a2, a3
+	sub     s0, t0, t1    // s0 is used
+	add     a0, s0, zero
+	lw      s0, 0(sp)     // s0 is restored
+	addi    sp, sp, 4     // space on stack is release
+	ret     // jr ra
+
+#pragma qtrvsim focus memory STACK_INIT-4*8

seminaries/qtrvsim/call-syscall/lec10-03-fact-buggy.S

+.globl  _start
+
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
+#pragma qtrvsim show peripherals
+
+.equ SPILED_REG_LED_LINE,   0xffffc104 // 32 bit word mapped as output
+.equ STACK_INIT, 0x01230000 // The bottom of the stack, the stack grows down
+
+.option norelax
+.text
+
+_start:
+main:
+	li     sp, STACK_INIT
+	addi   a0, zero, 4	// 4! -> 24
+	jal    fact
+	addi   t0, a0, 0
+
+	li     t1, SPILED_REG_LED_LINE
+	sw     t0, 0(t1)
+final:
+	ebreak
+	beq    zero, zero, final
+	nop
+
+fact:
+	addi   sp, sp, -4   // adjust stack for 1 item
+	sw     a0, 0(sp)    // save argument
+	slti   t0, a0, 1    // test for n < 1
+	beq    t0, zero, L1
+	addi   a0, zero, 1  // if so, result is 1
+	addi   sp, sp, 4    // pop 1 item from stack
+	ret                 // and return (jr ra)
+L1:	addi   a0, a0, -1   // else decrement n
+	jal    fact         // recursive call
+	lw     t0, 0(sp)    // restore original n
+	addi   sp, sp, 4    // pop 2 items from stack
+	mul    a0, a0, t0   // multiply to get result
+	jr     ra           // and return
+
+#pragma qtrvsim focus memory STACK_INIT-4*8

seminaries/qtrvsim/call-syscall/lec10-04-fact-ok.S

+.globl  _start
+
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
+#pragma qtrvsim show peripherals
+
+.equ SPILED_REG_LED_LINE,   0xffffc104 // 32 bit word mapped as output
+.equ STACK_INIT, 0x01230000 // The bottom of the stack, the stack grows down
+
+.option norelax
+.text
+
+_start:
+main:
+	li     sp, STACK_INIT
+	addi   a0, zero, 4	// 4! -> 24
+	jal    fact
+	addi   t0, a0, 0
+
+	li     t1, SPILED_REG_LED_LINE
+	sw     t0, 0(t1)
+final:
+	ebreak
+	beq    zero, zero, final
+	nop
+
+fact:
+	addi   sp, sp, -8   // adjust stack for 2 items
+	sw     ra, 4(sp)    // save return address
+	sw     a0, 0(sp)    // save argument
+	slti   t0, a0, 1    // test for n < 1
+	beq    t0, zero, L1
+	addi   a0, zero, 1  // if so, result is 1
+	addi   sp, sp, 8    // pop 2 items from stack
+	ret                 // and return (jr ra)
+L1:	addi   a0, a0, -1   // else decrement n
+	jal    fact         // recursive call
+	lw     t0, 0(sp)    // restore original n
+	lw     ra, 4(sp)    //   and return address
+	addi   sp, sp, 8    // pop 2 items from stack
+	mul    a0, a0, t0   // multiply to get result
+	jr     ra           // and return
+
+#pragma qtrvsim focus memory STACK_INIT-4*8

seminaries/qtrvsim/call-syscall/lec10-05-call-10args.S

+.globl  _start
+
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
+
+.equ SPILED_REG_LED_LINE,   0xffffc104 // 32 bit word mapped as output
+.equ STACK_INIT, 0x01230000 // The bottom of the stack, the stack grows down
+
+.option norelax
+.text
+
+.globl start
+.globl _start
+
+// int main(){
+//  int res;
+//  res = complex(1,2,3,4,5,6,7,8,9,10);
+//  return res;
+// }
+
+// riscv64-unknown-elf-gcc -D__ASSEMBLY__ -ggdb -mabi=ilp32 -march=rv32i -fno-lto -c lec10-call-10args.S -o lec10-call-10args.o
+// riscv64-unknown-elf-gcc -nostartfiles -nostdlib -static -mabi=ilp32 -march=rv32i lec10-call-10args.o -o lec10-call-10args
+
+
+start:
+_start:
+	la      sp, STACK_INIT
+	jal     main
+	li      t0, SPILED_REG_LED_LINE
+	sw      a0, 0(t0)
+final:
+	ebreak
+	beq     zero, zero, final
+	nop
+
+main:
+	addi    sp, sp, -48	// allocate space for save and arguments
+	sw      ra, 44(sp)	// store return address from main
+
+	sw      s0, 40(sp)	// store farme pointer, not required there
+	addi    s0, sp, 48	// set fp to point to top of the stack, not required
+				// see -fomit-frame-pointer/-fno-omit-frame-pointer
+
+	addi    t0, zero, 10	// 10-th argument value
+	sw      t0, 4(sp)	// 10-th argument to the stack
+	addi    t0, zero, 9	// 9-th argument value
+	sw      t0, 0(sp)	// 9-th argument to the stack
+	addi    a7, zero, 8	// 8-th argument value
+	addi    a6, zero, 7	// 7-rd argument value
+	addi    a5, zero, 6	// 6-nd argument value
+	addi    a4, zero, 5	// 5-st argument value
+	addi    a3, zero, 4	// 4-th argument value
+	addi    a2, zero, 3	// 3-rd argument value
+	addi    a1, zero, 2	// 2-nd argument value
+	addi    a0, zero, 1	// store 1-st argument value
+	jal     complex		// call complex function
+
+	sw      a0, -20(s0)	// store return value into local variable
+	lw      a5, -20(s0)	// move back to a0, caused by no optmalization
+	mv      a0, a5
+
+	addi    sp, s0, -48	// restore stack from frame pointer
+	lw      ra, 44(sp)	// restore return address
+	lw      s0, 40(sp)	// restore frame pointer, not required there
+	addi    sp, sp, 48	// free stack frame
+	jr      ra		// return from main, result in a0
+
+
+complex:
+	// sequnece to allocate function frame
+	addi    sp, sp, -48	// allocate frame for the function
+	sw      s0, 40(sp)	// store previous fp value
+	sw      ra, 44(sp)	// store return address to allow call subroutine,
+				// it is not required in leaf node function
+	addi    s0, sp, 48	// set fp to point to top of the stack
+
+	// function body, stack can be freely allocated
+	// to pas arguments and store local variables
+	add     a0, a0, a1	// add the arg 1-st and 2-nd
+	add     a0, a0, a2	// add the arg 3-rd
+	add     a0, a0, a3	// add the arg 4-th
+	add     a0, a0, a4	// add the arg 5-th
+	add     a0, a0, a5	// add the arg 6-th
+	add     a0, a0, a6	// add the arg 7-th
+	add     a0, a0, a7	// add the arg 8-th
+
+	lw      a5, 0(s0)	// load 9-th argument
+	add     a0, a0, a5	// add 9-th argument
+	lw      a5, 4(s0)	// load 10-th argument
+	add     a0, a0, a5	// add 10-th argument
+
+	// sequence to leave function frame
+	addi    sp, s0, -48	// restore stack from frame pointer
+	lw      ra, 44(sp)	// restore return address, not necessary in leaf node
+	lw      s0, 40(sp)	// restore previous frame pointer
+	addi    sp, sp, 48	// free stack frame in delay slot
+	jr      ra		// return from subroutine
+
+#pragma qtrvsim focus memory STACK_INIT-32-24

seminaries/qtrvsim/call-syscall/lec10-06-linus-hello.S

+// The simple program to run on RISC-V Linux kernel port
+
+.globl  _start
+
+// select core without pipeline but with delay slot
+
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
+#pragma qtrvsim show terminal
+
+// #include <asm/unistd.h>
+// #include <asm/asm.h>
+// #include <sys/syscall.h>
+
+.equ O_RDWR,       02
+
+// Linux kernel compatible system calls subset
+
+// Linux kernel compatible system calls subset
+
+.equ __NR_exit,        93  // void exit(int status)
+.equ __NR_read,        63  // ssize_t read(int fd, void *buf, size_t count)
+.equ __NR_write,       64  // ssize_t write(int fd, const void *buf, size_t count)
+.equ __NR_close,       57  // int close(int fd)
+.equ __NR_openat,      56  // int openat(int fd, const char *pathname, int flags, mode_t mode)
+	// use fd = -100 for normal open behaviour. Full openat not supported.
+.equ __NR_brk,         214 // void * brk(void *addr)
+.equ __NR_ftruncate64, 46  // int ftruncate64(int fd, off_t length)
+.equ __NR_readv,       65  // ssize_t readv(int fd, const struct iovec *iov, int iovcnt)
+.equ __NR_writev,      66  // ssize_t writev(int fd, const struct iovec *iov, int iovcnt)
+
+.option norelax
+.text
+
+_start:
+main:
+//	LEAF(main)
+//	fd = openat(AT_EMPTY_PATH, "/dev/tty1", O_RDWR, 0);
+	addi    a0, zero, -100
+	la      a1, tty
+	li      a2, O_RDWR
+	li      a3, 0
+	li      a7, __NR_openat
+	ecall
+	blt     a0, zero, quit
+	addi    s0, a0, 0         // delay slot
+//	write(fd, "hello, world.\n", 14);
+	addi    a0, s0, 0
+	la      a1, hello
+	li      a2, 14
+	li      a7, __NR_write
+	ecall
+//	close(fd);
+	addi    a0, s0, 0
+	li      a7, __NR_close
+	ecall
+
+quit:
+	li      a0, 0
+	li      a7, __NR_exit
+	ecall
+
+	ebreak
+	j       quit
+	nop
+
+//	END(main)
+
+	.data
+tty:    .asciz  "/dev/tty"
+hello:  .ascii  "Hello, world.\n"

seminaries/qtrvsim/qtrvsim-semstart/.gitignore

+*.o
+depend
+simple-lw-sw

seminaries/qtrvsim/qtrvsim-semstart/Makefile

+ARCH=riscv64-unknown-elf
+
+SOURCES = simple-lw-sw.S
+TARGET_EXE = simple-lw-sw
+
+LDFLAGS += -Wl,-Ttext,0x200 -Wl,-Tdata,0x400
+
+
+CC=$(ARCH)-gcc
+CXX=$(ARCH)-g++
+AS=$(ARCH)-as
+LD=$(ARCH)-ld
+OBJCOPY=$(ARCH)-objcopy
+
+ARCHFLAGS += -mabi=ilp32
+ARCHFLAGS += -march=rv32i
+ARCHFLAGS += -fno-lto
+
+CFLAGS  += -ggdb -Os -Wall
+CXXFLAGS+= -ggdb -Os -Wall
+AFLAGS  += -ggdb
+LDFLAGS += -ggdb
+LDFLAGS += -nostartfiles
+LDFLAGS += -nostdlib
+LDFLAGS += -static
+#LDFLAGS += -specs=/opt/musl/riscv64-linux-gnu/lib/musl-gcc.specs
+
+CFLAGS  += $(ARCHFLAGS)
+CXXFLAGS+= $(ARCHFLAGS)
+AFLAGS  += $(ARCHFLAGS)
+LDFLAGS += $(ARCHFLAGS)
+
+OBJECTS += $(filter %.o,$(SOURCES:%.S=%.o))
+OBJECTS += $(filter %.o,$(SOURCES:%.c=%.o))
+OBJECTS += $(filter %.o,$(SOURCES:%.cpp=%.o))
+
+all : default
+
+.PHONY : default clean dep all
+
+%.o:%.S
+	$(CC) -D__ASSEMBLY__ $(AFLAGS) -c $< -o $@
+
+%.o:%.c
+	$(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@
+
+%.o:%.cpp
+	$(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $<
+
+%.s:%.c
+	$(CC) $(CFLAGS) $(CPPFLAGS) -S $< -o $@
+
+default : $(TARGET_EXE)
+
+$(TARGET_EXE) : $(OBJECTS)
+	$(CC) $(LDFLAGS) $^ -o $@
+
+dep: depend
+
+depend: $(SOURCES) $(glob *.h)
+	echo '# autogenerated dependencies' > depend
+ifneq ($(filter %.S,$(SOURCES)),)
+	$(CC)  -D__ASSEMBLY__ $(AFLAGS) -w -E -M $(filter %.S,$(SOURCES)) \
+	  >> depend
+endif
+ifneq ($(filter %.c,$(SOURCES)),)
+	$(CC) $(CFLAGS) $(CPPFLAGS) -w -E -M $(filter %.c,$(SOURCES)) \
+	  >> depend
+endif
+ifneq ($(filter %.cpp,$(SOURCES)),)
+	$(CXX) $(CXXFLAGS) $(CPPFLAGS) -w -E -M $(filter %.cpp,$(SOURCES)) \
+	  >> depend
+endif
+
+clean:
+	rm -f *.o *.a $(OBJECTS) $(TARGET_EXE) depend
+
+#mips-elf-objdump --source -M no-aliases,reg-names=numeric qtmips_binrep
+
+-include depend

seminaries/qtrvsim/qtrvsim-semstart/simple-lw-sw.S

+//  Template file with simple memory example
+//  QtRVSim simulator https://github.com/cvut/qtrvsim/
+//
+//  template-os.S       - example file
+//
+//  (C) 2021 by Pavel Pisa
+//      e-mail:   pisa@cmp.felk.cvut.cz
+//      homepage: http://cmp.felk.cvut.cz/~pisa
+//      work:     http://www.pikron.com/
+//      license:  public domain
+
+// Directives to make interesting windows visible
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
+
+.globl _start
+.option norelax
+
+.text
+
+_start:
+loop:
+	// load the word from absolute address
+	lw     x2, 0x400(x0)
+	// store the word to absolute address
+	sw     x2, 0x404(x0)
+
+	// stop execution wait for debugger/user
+	// ebreak
+	// ensure that continuation does not
+	// interpret random data
+	beq    x0, x0, loop
+	nop
+	nop
+	ebreak
+
+.data
+.org 0x400
+
+src_val:
+	.word  0x12345678
+dst_val:
+	.word  0
+
+// Specify location to show in memory window
+#pragma qtrvsim focus memory src_val