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#Zynq Design to Test CTU Developed and Maintained CAN Cores
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The repository provides in multiple branches integration of multiple [CTU](https://www.cvut.cz/en) [FEE](http://www.fel.cvut.cz/en/) developed [CAN components](http://canbus.pages.fel.cvut.cz/) and technologies as well as general purpose peripherals and even motion control components to be run on Xilinx Zynq based systems.
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There are multiple branches with different subset of peripherals.
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### 2x CTU CAN FD Core + 2x FD tol OpenCores CAN + Zlogan on MZ_APO
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The actual most active project is integration of 2x [CTU CAN FD Core](https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core), 2x [FD tol OpenCores CAN](https://gitlab.fel.cvut.cz/canbus/zynq/sja1000-fdtol) (SJA1000) and [Zlogan](https://github.com/eltvor/zlogan/) logic analyzer in the design running on on the [PiKRON](http://pikron.com/) [MZ_APO](https://cw.fel.cvut.cz/b182/courses/b35apo/documentation/mz_apo/start) baseboards designed for [MicroZed](http://zedboard.org/product/microzed) SBC to support [Computer Architectures](https://cw.fel.cvut.cz/wiki/courses/b35apo/start) course .
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### CAN-BENCH Board and Design
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A bachelor theses of Martin Jeřábek: FPGA Based CAN Bus Channels Mutual Latency Tester and Evaluation, 2016
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[Full Text in PDF](uploads/56b4d27d8f81ae390fc98bdce803398f/F3-BP-2016-Jerabek-Martin-Jerabek-thesis-2016.pdf), [CAN-BENCH_Schematics](uploads/93b79611ed12cfb806fcefc6f86973fc/F3-BP-2016-Jerabek-Martin-priloha-CAN-BENCH_Schematics_RevA.pdf)
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### Howto Topics
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* [Use of MZ_APO for CTU CAN FD testing](ctucan_on_mz_apo) |
