diff --git a/seminaries/qtrvsim/fibo-hazards/fibo-hazards-template.S b/seminaries/qtrvsim/fibo-hazards/fibo-hazards-template.S
index acb5b5b16983a78a9c87dea7947ac575a2d9334d..063fd41c57f77776981600bd856b59761efac668 100644
--- a/seminaries/qtrvsim/fibo-hazards/fibo-hazards-template.S
+++ b/seminaries/qtrvsim/fibo-hazards/fibo-hazards-template.S
@@ -1,11 +1,11 @@
 // fibo-hazards.S file template, rename and implement the algorithm
-// Test algorithm in qtmips_gui program
+// Test algorithm in qtrvsim_gui program
 // Select the CPU core configuration to
 //    Pipelined without hazard unit and cache
 // This option select version where RAW dependencies which leads
 // to hazards are not resolved in hardware, you need to schedule
 // instruction execution according to the pipeline structure
-// (classical 5-stage MIPS) such way, that no dependency results
+// (classical 5-stage RISC-V) such way, that no dependency results
 // in a hazard
 
 
@@ -19,13 +19,13 @@
 // at address fibo_series, the series has to be followed by at least
 // one zero element
 
-// When tested by actual qtmips_cli version, the variant without hazard
-// unit cannot be selected (this is WIP for the test script), use qtmips_gui
+// When tested by actual qtrvsim_cli version, the variant without hazard
+// unit cannot be selected (this is WIP for the test script), use qtrvsim_gui
 // which is fully configurable
 
 // Directives to make interesting windows visible
-#pragma qtmips show registers
-#pragma qtmips show memory
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
 
 .option norelax
 
@@ -51,7 +51,7 @@ end_loop:
 	nop
 
 .data
-// .align    2 // not supported by QtMips yet
+// .align    2 // not supported by QtRVSim yet
 
 fibo_limit:
 	.word 15
@@ -59,4 +59,4 @@ fibo_series:
 	.skip 1000*4
 
 // Specify location to show in memory window
-#pragma qtmips focus memory fibo_limit
+#pragma qtrvsim focus memory fibo_limit