Damir Gruncl RVAPO work integration and cleanup
Cleanups
-
correct registers forwarding and HU -
add commit by Pavel Pisa -
accept imem and dmem reporting delayed_by_clk
Vivado Integration:
-
include component.xml in rvapo subdirectory -
include rvapo/axi-master (or rvapo/target/axi-master) -
other components rvapo/core (rvapo_intcon_pipeline.vhd / rvapo_intcon_singlecycle.vhd) -
minimize Vivado project
See Vivado project example
- https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top/-/tree/master/system/src
- structure can be archived by export to TCL or blockdesign