From 4b5c825f079b811c06e82075e8a8ca142d168c6c Mon Sep 17 00:00:00 2001
From: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Date: Sat, 5 Mar 2022 10:54:08 +0100
Subject: [PATCH] seminaries/qtrvsim/selection-sort: add test program for cache
 tutorial

The forth B35APO tutorial focused on the cache operation

  https://cw.fel.cvut.cz/wiki/courses/b35apo/en/tutorials/04/start

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
---
 seminaries/qtrvsim/selection-sort/.gitignore  |  4 +
 seminaries/qtrvsim/selection-sort/Makefile    | 77 +++++++++++++++++++
 .../qtrvsim/selection-sort/selection-sort.S   | 72 +++++++++++++++++
 3 files changed, 153 insertions(+)
 create mode 100644 seminaries/qtrvsim/selection-sort/.gitignore
 create mode 100644 seminaries/qtrvsim/selection-sort/Makefile
 create mode 100644 seminaries/qtrvsim/selection-sort/selection-sort.S

diff --git a/seminaries/qtrvsim/selection-sort/.gitignore b/seminaries/qtrvsim/selection-sort/.gitignore
new file mode 100644
index 0000000..8c86613
--- /dev/null
+++ b/seminaries/qtrvsim/selection-sort/.gitignore
@@ -0,0 +1,4 @@
+*.o
+depend
+selection-sort
+
diff --git a/seminaries/qtrvsim/selection-sort/Makefile b/seminaries/qtrvsim/selection-sort/Makefile
new file mode 100644
index 0000000..e15fcd2
--- /dev/null
+++ b/seminaries/qtrvsim/selection-sort/Makefile
@@ -0,0 +1,77 @@
+ARCH=riscv64-unknown-elf
+
+SOURCES = selection-sort.S
+TARGET_EXE = selection-sort
+
+CC=$(ARCH)-gcc
+CXX=$(ARCH)-g++
+AS=$(ARCH)-as
+LD=$(ARCH)-ld
+OBJCOPY=$(ARCH)-objcopy
+
+ARCHFLAGS += -mabi=ilp32
+ARCHFLAGS += -march=rv32i
+ARCHFLAGS += -fno-lto
+
+CFLAGS  += -ggdb -Os -Wall
+CXXFLAGS+= -ggdb -Os -Wall
+AFLAGS  += -ggdb
+LDFLAGS += -ggdb
+LDFLAGS += -nostartfiles
+LDFLAGS += -nostdlib
+LDFLAGS += -static
+#LDFLAGS += -specs=/opt/musl/riscv64-linux-gnu/lib/musl-gcc.specs
+
+CFLAGS  += $(ARCHFLAGS)
+CXXFLAGS+= $(ARCHFLAGS)
+AFLAGS  += $(ARCHFLAGS)
+LDFLAGS += $(ARCHFLAGS)
+
+OBJECTS += $(filter %.o,$(SOURCES:%.S=%.o))
+OBJECTS += $(filter %.o,$(SOURCES:%.c=%.o))
+OBJECTS += $(filter %.o,$(SOURCES:%.cpp=%.o))
+
+all : default
+
+.PHONY : default clean dep all
+
+%.o:%.S
+	$(CC) -D__ASSEMBLY__ $(AFLAGS) -c $< -o $@
+
+%.o:%.c
+	$(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@
+
+%.o:%.cpp
+	$(CXX) $(CXXFLAGS) $(CPPFLAGS) -c $<
+
+%.s:%.c
+	$(CC) $(CFLAGS) $(CPPFLAGS) -S $< -o $@
+
+default : $(TARGET_EXE)
+
+$(TARGET_EXE) : $(OBJECTS)
+	$(CC) $(LDFLAGS) $^ -o $@
+
+dep: depend
+
+depend: $(SOURCES) $(glob *.h)
+	echo '# autogenerated dependencies' > depend
+ifneq ($(filter %.S,$(SOURCES)),)
+	$(CC)  -D__ASSEMBLY__ $(AFLAGS) -w -E -M $(filter %.S,$(SOURCES)) \
+	  >> depend
+endif
+ifneq ($(filter %.c,$(SOURCES)),)
+	$(CC) $(CFLAGS) $(CPPFLAGS) -w -E -M $(filter %.c,$(SOURCES)) \
+	  >> depend
+endif
+ifneq ($(filter %.cpp,$(SOURCES)),)
+	$(CXX) $(CXXFLAGS) $(CPPFLAGS) -w -E -M $(filter %.cpp,$(SOURCES)) \
+	  >> depend
+endif
+
+clean:
+	rm -f *.o *.a $(OBJECTS) $(TARGET_EXE) depend
+
+#mips-elf-objdump --source -M no-aliases,reg-names=numeric qtmips_binrep
+
+-include depend
diff --git a/seminaries/qtrvsim/selection-sort/selection-sort.S b/seminaries/qtrvsim/selection-sort/selection-sort.S
new file mode 100644
index 0000000..02eeedb
--- /dev/null
+++ b/seminaries/qtrvsim/selection-sort/selection-sort.S
@@ -0,0 +1,72 @@
+// Simple sorting algorithm - selection sort
+
+// Directives to make interesting windows visible
+#pragma qtrvsim show registers
+#pragma qtrvsim show memory
+
+.option norelax
+
+.globl  array
+.globl  _start
+
+.text
+
+_start:
+
+la   a0, array
+addi s0, zero, 0  //Minimum value from the rest of the array will be placed here. (Offset in the array, increasing by 4 bytes).
+addi s1, zero, 60 // Maximal index/offset value. Used for cycle termination = number of values in array * 4.
+add  s2, zero, s0 //Working position (offset)
+// s3 - offset of the smallest value found so far in given run
+// s4 - value of the smallest value found so far in  given run
+// s5 - temporary
+
+main_cycle:
+        beq  s0, s1, main_cycle_end
+
+        add  t0, a0, s0
+        lw   s4, 0(t0)   // lw  s4, array(s0)
+        add  s3, s0, zero
+        add  s2, s0, zero
+
+inner_cycle:
+        beq  s2, s1, inner_cycle_end
+                add  t0, a0, s2
+                lw   s5, 0(t0) // lw s5, array(s2)
+
+                // expand bgt s5, s4, not_minimum
+                slt  t0, s4, s5
+                bne  t0, zero, not_minimum
+
+                        addi s3, s2, 0
+                        addi s4, s5, 0
+not_minimum:
+                addi s2, s2, 4
+                j inner_cycle
+inner_cycle_end:
+        add  t0, a0, s0
+        lw   s5, 0(t0)  // lw s5, array(s0)
+        sw   s4, 0(t0)  // sw s4, array(s0)
+        add  t0, a0, s3
+        sw   s5, 0(t0)  // sw s5, array(s3)
+
+        addi s0, s0, 4
+        j main_cycle
+main_cycle_end:
+
+//Final infinite loop
+end_loop:
+        fence            // flush cache memory
+        ebreak           // stop the simulator
+        j end_loop
+
+.org 0x400
+
+.data
+// .align    2 // not supported by QtRVSsim
+
+array:
+.word    5, 3, 4, 1, 15, 8, 9, 2, 10, 6, 11, 1, 6, 9, 12
+
+// Specify location to show in memory window
+#pragma qtrvsim focus memory array
-- 
GitLab