Commit 9e5319ca authored by Peter Maydell's avatar Peter Maydell

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Compilation fix for KVM (Alex)
* SMM fix (Dmitry)
* VFIO error reporting (Eric)
* win32 fixes and workarounds (Marc-André)
* qemu-pr-helper crash bugfix (Maxim)
* Memory leak fixes (myself)
* VMX features (myself)
* Record-replay deadlock (Pavel)
* i386 CPUID bits (Sebastian)
* kconfig tweak (Thomas)
* Valgrind fix (Thomas)
* Autoconverge test (Yury)

# gpg: Signature made Fri 04 Oct 2019 17:57:48 BST
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (29 commits)
  target/i386/kvm: Silence warning from Valgrind about uninitialized bytes
  target/i386: work around KVM_GET_MSRS bug for secondary execution controls
  target/i386: add VMX features
  vmxcap: correct the name of the variables
  target/i386: add VMX definitions
  target/i386: expand feature words to 64 bits
  target/i386: introduce generic feature dependency mechanism
  target/i386: handle filtered_features in a new function mark_unavailable_features
  tests/docker: only enable ubsan for test-clang
  win32: work around main-loop busy loop on socket/fd event
  tests: skip serial test on windows
  util: WSAEWOULDBLOCK on connect should map to EINPROGRESS
  Fix wrong behavior of cpu_memory_rw_debug() function in SMM
  memory: allow memory_region_register_iommu_notifier() to fail
  vfio: Turn the container error into an Error handle
  i386: Add CPUID bit for CLZERO and XSAVEERPTR
  docker: test-debug: disable LeakSanitizer
  lm32: do not leak memory on object_new/object_unref
  cris: do not leak struct cris_disasm_data
  mips: fix memory leaks in board initialization
  ...
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 4f591025 a1834d97
...@@ -712,11 +712,11 @@ static int kvm_physical_log_clear(KVMMemoryListener *kml, ...@@ -712,11 +712,11 @@ static int kvm_physical_log_clear(KVMMemoryListener *kml,
KVMState *s = kvm_state; KVMState *s = kvm_state;
uint64_t start, size, offset, count; uint64_t start, size, offset, count;
KVMSlot *mem; KVMSlot *mem;
int ret, i; int ret = 0, i;
if (!s->manual_dirty_log_protect) { if (!s->manual_dirty_log_protect) {
/* No need to do explicit clear */ /* No need to do explicit clear */
return 0; return ret;
} }
start = section->offset_within_address_space; start = section->offset_within_address_space;
...@@ -724,7 +724,7 @@ static int kvm_physical_log_clear(KVMMemoryListener *kml, ...@@ -724,7 +724,7 @@ static int kvm_physical_log_clear(KVMMemoryListener *kml,
if (!size) { if (!size) {
/* Nothing more we can do... */ /* Nothing more we can do... */
return 0; return ret;
} }
kvm_slots_lock(kml); kvm_slots_lock(kml);
......
...@@ -1294,24 +1294,17 @@ static int cris_constraint ...@@ -1294,24 +1294,17 @@ static int cris_constraint
/* Parse disassembler options and store state in info. FIXME: For the /* Parse disassembler options and store state in info. FIXME: For the
time being, we abuse static variables. */ time being, we abuse static variables. */
static bfd_boolean static void
cris_parse_disassembler_options (disassemble_info *info, cris_parse_disassembler_options (struct cris_disasm_data *disdata,
char *disassembler_options,
enum cris_disass_family distype) enum cris_disass_family distype)
{ {
struct cris_disasm_data *disdata;
info->private_data = calloc (1, sizeof (struct cris_disasm_data));
disdata = (struct cris_disasm_data *) info->private_data;
if (disdata == NULL)
return false;
/* Default true. */ /* Default true. */
disdata->trace_case disdata->trace_case
= (info->disassembler_options == NULL = (disassembler_options == NULL
|| (strcmp (info->disassembler_options, "nocase") != 0)); || (strcmp (disassembler_options, "nocase") != 0));
disdata->distype = distype; disdata->distype = distype;
return true;
} }
static const struct cris_spec_reg * static const struct cris_spec_reg *
...@@ -2736,9 +2729,10 @@ static int ...@@ -2736,9 +2729,10 @@ static int
print_insn_cris_with_register_prefix (bfd_vma vma, print_insn_cris_with_register_prefix (bfd_vma vma,
disassemble_info *info) disassemble_info *info)
{ {
if (info->private_data == NULL struct cris_disasm_data disdata;
&& !cris_parse_disassembler_options (info, cris_dis_v0_v10)) info->private_data = &disdata;
return -1; cris_parse_disassembler_options (&disdata, info->disassembler_options,
cris_dis_v0_v10);
return print_insn_cris_generic (vma, info, true); return print_insn_cris_generic (vma, info, true);
} }
/* Disassemble, prefixing register names with `$'. CRIS v32. */ /* Disassemble, prefixing register names with `$'. CRIS v32. */
...@@ -2747,9 +2741,10 @@ static int ...@@ -2747,9 +2741,10 @@ static int
print_insn_crisv32_with_register_prefix (bfd_vma vma, print_insn_crisv32_with_register_prefix (bfd_vma vma,
disassemble_info *info) disassemble_info *info)
{ {
if (info->private_data == NULL struct cris_disasm_data disdata;
&& !cris_parse_disassembler_options (info, cris_dis_v32)) info->private_data = &disdata;
return -1; cris_parse_disassembler_options (&disdata, info->disassembler_options,
cris_dis_v32);
return print_insn_cris_generic (vma, info, true); return print_insn_cris_generic (vma, info, true);
} }
...@@ -2761,9 +2756,10 @@ static int ...@@ -2761,9 +2756,10 @@ static int
print_insn_crisv10_v32_with_register_prefix (bfd_vma vma, print_insn_crisv10_v32_with_register_prefix (bfd_vma vma,
disassemble_info *info) disassemble_info *info)
{ {
if (info->private_data == NULL struct cris_disasm_data disdata;
&& !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) info->private_data = &disdata;
return -1; cris_parse_disassembler_options (&disdata, info->disassembler_options,
cris_dis_common_v10_v32);
return print_insn_cris_generic (vma, info, true); return print_insn_cris_generic (vma, info, true);
} }
...@@ -2773,9 +2769,10 @@ static int ...@@ -2773,9 +2769,10 @@ static int
print_insn_cris_without_register_prefix (bfd_vma vma, print_insn_cris_without_register_prefix (bfd_vma vma,
disassemble_info *info) disassemble_info *info)
{ {
if (info->private_data == NULL struct cris_disasm_data disdata;
&& !cris_parse_disassembler_options (info, cris_dis_v0_v10)) info->private_data = &disdata;
return -1; cris_parse_disassembler_options (&disdata, info->disassembler_options,
cris_dis_v0_v10);
return print_insn_cris_generic (vma, info, false); return print_insn_cris_generic (vma, info, false);
} }
...@@ -2785,9 +2782,10 @@ static int ...@@ -2785,9 +2782,10 @@ static int
print_insn_crisv32_without_register_prefix (bfd_vma vma, print_insn_crisv32_without_register_prefix (bfd_vma vma,
disassemble_info *info) disassemble_info *info)
{ {
if (info->private_data == NULL struct cris_disasm_data disdata;
&& !cris_parse_disassembler_options (info, cris_dis_v32)) info->private_data = &disdata;
return -1; cris_parse_disassembler_options (&disdata, info->disassembler_options,
cris_dis_v32);
return print_insn_cris_generic (vma, info, false); return print_insn_cris_generic (vma, info, false);
} }
...@@ -2798,9 +2796,10 @@ static int ...@@ -2798,9 +2796,10 @@ static int
print_insn_crisv10_v32_without_register_prefix (bfd_vma vma, print_insn_crisv10_v32_without_register_prefix (bfd_vma vma,
disassemble_info *info) disassemble_info *info)
{ {
if (info->private_data == NULL struct cris_disasm_data disdata;
&& !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) info->private_data = &disdata;
return -1; cris_parse_disassembler_options (&disdata, info->disassembler_options,
cris_dis_common_v10_v32);
return print_insn_cris_generic (vma, info, false); return print_insn_cris_generic (vma, info, false);
} }
#endif #endif
......
...@@ -660,7 +660,8 @@ static void tcg_register_iommu_notifier(CPUState *cpu, ...@@ -660,7 +660,8 @@ static void tcg_register_iommu_notifier(CPUState *cpu,
*/ */
MemoryRegion *mr = MEMORY_REGION(iommu_mr); MemoryRegion *mr = MEMORY_REGION(iommu_mr);
TCGIOMMUNotifier *notifier; TCGIOMMUNotifier *notifier;
int i; Error *err = NULL;
int i, ret;
for (i = 0; i < cpu->iommu_notifiers->len; i++) { for (i = 0; i < cpu->iommu_notifiers->len; i++) {
notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i); notifier = g_array_index(cpu->iommu_notifiers, TCGIOMMUNotifier *, i);
...@@ -689,7 +690,12 @@ static void tcg_register_iommu_notifier(CPUState *cpu, ...@@ -689,7 +690,12 @@ static void tcg_register_iommu_notifier(CPUState *cpu,
0, 0,
HWADDR_MAX, HWADDR_MAX,
iommu_idx); iommu_idx);
memory_region_register_iommu_notifier(notifier->mr, &notifier->n); ret = memory_region_register_iommu_notifier(notifier->mr, &notifier->n,
&err);
if (ret) {
error_report_err(err);
exit(1);
}
} }
if (!notifier->active) { if (!notifier->active) {
...@@ -2959,8 +2965,17 @@ static void tcg_log_global_after_sync(MemoryListener *listener) ...@@ -2959,8 +2965,17 @@ static void tcg_log_global_after_sync(MemoryListener *listener)
* by pushing the migration thread's memory read after the vCPU thread has * by pushing the migration thread's memory read after the vCPU thread has
* written the memory. * written the memory.
*/ */
cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener); if (replay_mode == REPLAY_MODE_NONE) {
run_on_cpu(cpuas->cpu, do_nothing, RUN_ON_CPU_NULL); /*
* VGA can make calls to this function while updating the screen.
* In record/replay mode this causes a deadlock, because
* run_on_cpu waits for rr mutex. Therefore no races are possible
* in this case and no need for making run_on_cpu when
* record/replay is not enabled.
*/
cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);
run_on_cpu(cpuas->cpu, do_nothing, RUN_ON_CPU_NULL);
}
} }
static void tcg_commit(MemoryListener *listener) static void tcg_commit(MemoryListener *listener)
......
...@@ -1469,20 +1469,21 @@ static void smmuv3_class_init(ObjectClass *klass, void *data) ...@@ -1469,20 +1469,21 @@ static void smmuv3_class_init(ObjectClass *klass, void *data)
dc->realize = smmu_realize; dc->realize = smmu_realize;
} }
static void smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, static int smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu,
IOMMUNotifierFlag old, IOMMUNotifierFlag old,
IOMMUNotifierFlag new) IOMMUNotifierFlag new,
Error **errp)
{ {
SMMUDevice *sdev = container_of(iommu, SMMUDevice, iommu); SMMUDevice *sdev = container_of(iommu, SMMUDevice, iommu);
SMMUv3State *s3 = sdev->smmu; SMMUv3State *s3 = sdev->smmu;
SMMUState *s = &(s3->smmu_state); SMMUState *s = &(s3->smmu_state);
if (new & IOMMU_NOTIFIER_MAP) { if (new & IOMMU_NOTIFIER_MAP) {
int bus_num = pci_bus_num(sdev->bus); error_setg(errp,
PCIDevice *pcidev = pci_find_device(sdev->bus, bus_num, sdev->devfn); "device %02x.%02x.%x requires iommu MAP notifier which is "
"not currently supported", pci_bus_num(sdev->bus),
warn_report("SMMUv3 does not support notification on MAP: " PCI_SLOT(sdev->devfn), PCI_FUNC(sdev->devfn));
"device %s will not function properly", pcidev->name); return -EINVAL;
} }
if (old == IOMMU_NOTIFIER_NONE) { if (old == IOMMU_NOTIFIER_NONE) {
...@@ -1492,6 +1493,7 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, ...@@ -1492,6 +1493,7 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu,
trace_smmuv3_notify_flag_del(iommu->parent_obj.name); trace_smmuv3_notify_flag_del(iommu->parent_obj.name);
QLIST_REMOVE(sdev, next); QLIST_REMOVE(sdev, next);
} }
return 0;
} }
static void smmuv3_iommu_memory_region_class_init(ObjectClass *klass, static void smmuv3_iommu_memory_region_class_init(ObjectClass *klass,
......
...@@ -485,6 +485,7 @@ PCIBus *dino_init(MemoryRegion *addr_space, ...@@ -485,6 +485,7 @@ PCIBus *dino_init(MemoryRegion *addr_space,
memory_region_init_alias(&s->pci_mem_alias[i], OBJECT(s), memory_region_init_alias(&s->pci_mem_alias[i], OBJECT(s),
name, &s->pci_mem, addr, name, &s->pci_mem, addr,
DINO_MEM_CHUNK_SIZE); DINO_MEM_CHUNK_SIZE);
g_free(name);
} }
/* Set up PCI view of memory: Bus master address space. */ /* Set up PCI view of memory: Bus master address space. */
......
...@@ -78,13 +78,15 @@ static void machine_hppa_init(MachineState *machine) ...@@ -78,13 +78,15 @@ static void machine_hppa_init(MachineState *machine)
/* Create CPUs. */ /* Create CPUs. */
for (i = 0; i < smp_cpus; i++) { for (i = 0; i < smp_cpus; i++) {
char *name = g_strdup_printf("cpu%ld-io-eir", i);
cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
cpu_region = g_new(MemoryRegion, 1); cpu_region = g_new(MemoryRegion, 1);
memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
cpu[i], g_strdup_printf("cpu%ld-io-eir", i), 4); cpu[i], name, 4);
memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000, memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
cpu_region); cpu_region);
g_free(name);
} }
/* Limit main memory. */ /* Limit main memory. */
......
...@@ -1466,18 +1466,21 @@ static const MemoryRegionOps mmio_mem_ops = { ...@@ -1466,18 +1466,21 @@ static const MemoryRegionOps mmio_mem_ops = {
} }
}; };
static void amdvi_iommu_notify_flag_changed(IOMMUMemoryRegion *iommu, static int amdvi_iommu_notify_flag_changed(IOMMUMemoryRegion *iommu,
IOMMUNotifierFlag old, IOMMUNotifierFlag old,
IOMMUNotifierFlag new) IOMMUNotifierFlag new,
Error **errp)
{ {
AMDVIAddressSpace *as = container_of(iommu, AMDVIAddressSpace, iommu); AMDVIAddressSpace *as = container_of(iommu, AMDVIAddressSpace, iommu);
if (new & IOMMU_NOTIFIER_MAP) { if (new & IOMMU_NOTIFIER_MAP) {
error_report("device %02x.%02x.%x requires iommu notifier which is not " error_setg(errp,
"currently supported", as->bus_num, PCI_SLOT(as->devfn), "device %02x.%02x.%x requires iommu notifier which is not "
PCI_FUNC(as->devfn)); "currently supported", as->bus_num, PCI_SLOT(as->devfn),
exit(1); PCI_FUNC(as->devfn));
return -EINVAL;
} }
return 0;
} }
static void amdvi_init(AMDVIState *s) static void amdvi_init(AMDVIState *s)
......
...@@ -2929,9 +2929,10 @@ static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr addr, ...@@ -2929,9 +2929,10 @@ static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr addr,
return iotlb; return iotlb;
} }
static void vtd_iommu_notify_flag_changed(IOMMUMemoryRegion *iommu, static int vtd_iommu_notify_flag_changed(IOMMUMemoryRegion *iommu,
IOMMUNotifierFlag old, IOMMUNotifierFlag old,
IOMMUNotifierFlag new) IOMMUNotifierFlag new,
Error **errp)
{ {
VTDAddressSpace *vtd_as = container_of(iommu, VTDAddressSpace, iommu); VTDAddressSpace *vtd_as = container_of(iommu, VTDAddressSpace, iommu);
IntelIOMMUState *s = vtd_as->iommu_state; IntelIOMMUState *s = vtd_as->iommu_state;
...@@ -2944,6 +2945,7 @@ static void vtd_iommu_notify_flag_changed(IOMMUMemoryRegion *iommu, ...@@ -2944,6 +2945,7 @@ static void vtd_iommu_notify_flag_changed(IOMMUMemoryRegion *iommu,
} else if (new == IOMMU_NOTIFIER_NONE) { } else if (new == IOMMU_NOTIFIER_NONE) {
QLIST_REMOVE(vtd_as, next); QLIST_REMOVE(vtd_as, next);
} }
return 0;
} }
static int vtd_post_load(void *opaque, int version_id) static int vtd_post_load(void *opaque, int version_id)
......
...@@ -300,6 +300,7 @@ static void pci_cmd646_ide_realize(PCIDevice *dev, Error **errp) ...@@ -300,6 +300,7 @@ static void pci_cmd646_ide_realize(PCIDevice *dev, Error **errp)
d->bmdma[i].bus = &d->bus[i]; d->bmdma[i].bus = &d->bus[i];
ide_register_restart_cb(&d->bus[i]); ide_register_restart_cb(&d->bus[i]);
} }
g_free(irq);
vmstate_register(DEVICE(dev), 0, &vmstate_ide_pci, d); vmstate_register(DEVICE(dev), 0, &vmstate_ide_pci, d);
qemu_register_reset(cmd646_reset, d); qemu_register_reset(cmd646_reset, d);
......
...@@ -13,9 +13,13 @@ config I82378 ...@@ -13,9 +13,13 @@ config I82378
select MC146818RTC select MC146818RTC
select PCSPK select PCSPK
config PC87312 config ISA_SUPERIO
bool bool
select ISA_BUS select ISA_BUS
config PC87312
bool
select ISA_SUPERIO
select I8259 select I8259
select I8254 select I8254
select I8257 select I8257
...@@ -34,14 +38,14 @@ config PIIX4 ...@@ -34,14 +38,14 @@ config PIIX4
config VT82C686 config VT82C686
bool bool
select ISA_BUS select ISA_SUPERIO
select ACPI_SMBUS select ACPI_SMBUS
select SERIAL_ISA select SERIAL_ISA
select FDC select FDC
config SMC37C669 config SMC37C669
bool bool
select ISA_BUS select ISA_SUPERIO
select SERIAL_ISA select SERIAL_ISA
select PARALLEL select PARALLEL
select FDC select FDC
......
common-obj-$(CONFIG_ISA_BUS) += isa-bus.o common-obj-$(CONFIG_ISA_BUS) += isa-bus.o
common-obj-$(CONFIG_ISA_BUS) += isa-superio.o common-obj-$(CONFIG_ISA_SUPERIO) += isa-superio.o
common-obj-$(CONFIG_APM) += apm.o common-obj-$(CONFIG_APM) += apm.o
common-obj-$(CONFIG_I82378) += i82378.o common-obj-$(CONFIG_I82378) += i82378.o
common-obj-$(CONFIG_PC87312) += pc87312.o common-obj-$(CONFIG_PC87312) += pc87312.o
......
...@@ -273,6 +273,8 @@ static void mcf5208evb_init(MachineState *machine) ...@@ -273,6 +273,8 @@ static void mcf5208evb_init(MachineState *machine)
0xfc030000, pic + 36); 0xfc030000, pic + 36);
} }
g_free(pic);
/* 0xfc000000 SCM. */ /* 0xfc000000 SCM. */
/* 0xfc004000 XBS. */ /* 0xfc004000 XBS. */
/* 0xfc008000 FlexBus CS. */ /* 0xfc008000 FlexBus CS. */
......
...@@ -100,6 +100,7 @@ static int microblaze_load_dtb(hwaddr addr, ...@@ -100,6 +100,7 @@ static int microblaze_load_dtb(hwaddr addr,
} }
cpu_physical_memory_write(addr, fdt, fdt_size); cpu_physical_memory_write(addr, fdt, fdt_size);
g_free(fdt);
return fdt_size; return fdt_size;
} }
......
...@@ -13,6 +13,7 @@ config R4K ...@@ -13,6 +13,7 @@ config R4K
config MALTA config MALTA
bool bool
select ISA_SUPERIO
config MIPSSIM config MIPSSIM
bool bool
......
...@@ -81,6 +81,7 @@ void cpu_mips_irq_init_cpu(MIPSCPU *cpu) ...@@ -81,6 +81,7 @@ void cpu_mips_irq_init_cpu(MIPSCPU *cpu)
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
env->irq[i] = qi[i]; env->irq[i] = qi[i];
} }
g_free(qi);
} }
void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level) void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level)
......
...@@ -362,6 +362,8 @@ static void mips_jazz_init(MachineState *machine, ...@@ -362,6 +362,8 @@ static void mips_jazz_init(MachineState *machine,
/* LED indicator */ /* LED indicator */
sysbus_create_simple("jazz-led", 0x8000f000, NULL); sysbus_create_simple("jazz-led", 0x8000f000, NULL);
g_free(dmas);
} }
static static
......
...@@ -205,9 +205,10 @@ static int spapr_tce_get_attr(IOMMUMemoryRegion *iommu, ...@@ -205,9 +205,10 @@ static int spapr_tce_get_attr(IOMMUMemoryRegion *iommu,
return -EINVAL; return -EINVAL;
} }
static void spapr_tce_notify_flag_changed(IOMMUMemoryRegion *iommu, static int spapr_tce_notify_flag_changed(IOMMUMemoryRegion *iommu,
IOMMUNotifierFlag old, IOMMUNotifierFlag old,
IOMMUNotifierFlag new) IOMMUNotifierFlag new,
Error **errp)
{ {
struct SpaprTceTable *tbl = container_of(iommu, SpaprTceTable, iommu); struct SpaprTceTable *tbl = container_of(iommu, SpaprTceTable, iommu);
...@@ -216,6 +217,7 @@ static void spapr_tce_notify_flag_changed(IOMMUMemoryRegion *iommu, ...@@ -216,6 +217,7 @@ static void spapr_tce_notify_flag_changed(IOMMUMemoryRegion *iommu,
} else if (old != IOMMU_NOTIFIER_NONE && new == IOMMU_NOTIFIER_NONE) { } else if (old != IOMMU_NOTIFIER_NONE && new == IOMMU_NOTIFIER_NONE) {
spapr_tce_set_need_vfio(tbl, false); spapr_tce_set_need_vfio(tbl, false);
} }
return 0;
} }
static int spapr_tce_table_post_load(void *opaque, int version_id) static int spapr_tce_table_post_load(void *opaque, int version_id)
......
...@@ -186,9 +186,6 @@ static void lm32_timer_init(Object *obj) ...@@ -186,9 +186,6 @@ static void lm32_timer_init(Object *obj)
sysbus_init_irq(dev, &s->irq); sysbus_init_irq(dev, &s->irq);
s->bh = qemu_bh_new(timer_hit, s);
s->ptimer = ptimer_init(s->bh, PTIMER_POLICY_DEFAULT);
memory_region_init_io(&s->iomem, obj, &timer_ops, s, memory_region_init_io(&s->iomem, obj, &timer_ops, s,
"timer", R_MAX * 4); "timer", R_MAX * 4);
sysbus_init_mmio(dev, &s->iomem); sysbus_init_mmio(dev, &s->iomem);
...@@ -198,6 +195,9 @@ static void lm32_timer_realize(DeviceState *dev, Error **errp) ...@@ -198,6 +195,9 @@ static void lm32_timer_realize(DeviceState *dev, Error **errp)
{ {
LM32TimerState *s = LM32_TIMER(dev); LM32TimerState *s = LM32_TIMER(dev);
s->bh = qemu_bh_new(timer_hit, s);
s->ptimer = ptimer_init(s->bh, PTIMER_POLICY_DEFAULT);
ptimer_set_freq(s->ptimer, s->freq_hz); ptimer_set_freq(s->ptimer, s->freq_hz);
} }
......
...@@ -283,11 +283,6 @@ static void milkymist_sysctl_init(Object *obj) ...@@ -283,11 +283,6 @@ static void milkymist_sysctl_init(Object *obj)
sysbus_init_irq(dev, &s->timer0_irq); sysbus_init_irq(dev, &s->timer0_irq);
sysbus_init_irq(dev, &s->timer1_irq); sysbus_init_irq(dev, &s->timer1_irq);
s->bh0 = qemu_bh_new(timer0_hit, s);
s->bh1 = qemu_bh_new(timer1_hit, s);
s->ptimer0 = ptimer_init(s->bh0, PTIMER_POLICY_DEFAULT);
s->ptimer1 = ptimer_init(s->bh1, PTIMER_POLICY_DEFAULT);
memory_region_init_io(&s->regs_region, obj, &sysctl_mmio_ops, s, memory_region_init_io(&s->regs_region, obj, &sysctl_mmio_ops, s,
"milkymist-sysctl", R_MAX * 4); "milkymist-sysctl", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region); sysbus_init_mmio(dev, &s->regs_region);
...@@ -297,6 +292,11 @@ static void milkymist_sysctl_realize(DeviceState *dev, Error **errp) ...@@ -297,6 +292,11 @@ static void milkymist_sysctl_realize(DeviceState *dev, Error **errp)
{ {
MilkymistSysctlState *s = MILKYMIST_SYSCTL(dev); MilkymistSysctlState *s = MILKYMIST_SYSCTL(dev);
s->bh0 = qemu_bh_new(timer0_hit, s);
s->bh1 = qemu_bh_new(timer1_hit, s);
s->ptimer0 = ptimer_init(s->bh0, PTIMER_POLICY_DEFAULT);
s->ptimer1 = ptimer_init(s->bh1, PTIMER_POLICY_DEFAULT);
ptimer_set_freq(s->ptimer0, s->freq_hz); ptimer_set_freq(s->ptimer0, s->freq_hz);
ptimer_set_freq(s->ptimer1, s->freq_hz); ptimer_set_freq(s->ptimer1, s->freq_hz);
} }
......
...@@ -509,6 +509,7 @@ static void vfio_listener_region_add(MemoryListener *listener, ...@@ -509,6 +509,7 @@ static void vfio_listener_region_add(MemoryListener *listener,
int ret; int ret;
VFIOHostDMAWindow *hostwin; VFIOHostDMAWindow *hostwin;