- 17 Oct, 2020 2 commits
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Pavel Pisa authored
The target board support is tested and targets exactly DE0-Nano-SoC Terasic board. It uses Cyclone V 5CSEMA4U23C6 chub but the chip can require different setup on other board. So be more specific with directory name. Signed-off-by:
Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Jaroslav Beran authored
`mkimage` tool prepends U-Boot header to the provided plain script, so it can be recognized by the bootloader. It has to be put on the FAT32 boot partition of the SD card and its name has to be exactly `boot.scr`.
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- 16 Oct, 2020 2 commits
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Jaroslav Beran authored
The added `preloader` target generates `preloader-mkpimage.bin` in default `spl_bsp` directory. It works with version 18.1 of Quartus Prime, which contains every external dependencies within its installation tree (UBoot SPL, arm-eabi cross compiler). The resulted image has to be written to a dedicated partition on a SD card. The partition type in MBR has to be `0xa2` (set e.g. by fdisk utility). Following command can be used assuming /dev/mmcblk0p3 is the target partition (be extra careful!) # dd of=/dev/mmcblk0p3 bs=512 if=preloader-mkpimage.bin ; sync
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Jaroslav Beran authored
The DTS corresponds to the actual HW design and has to be kept up to date if any HW changes are applied (IRQ or memory address mappings, clock source changes, number of the instances, etc.) Put this file in arch/arm/boot/dts/ of `linux-socfpga` kernel source tree. In top-level directory run: make ARCH=arm CROSS_COMPILE=/path/to/cross-arm-toolchain-tupple- socfpga_cyclone5_de0_sockit_ctucanfd.dtb
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- 15 Oct, 2020 3 commits
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Pavel Pisa authored
Signed-off-by:
Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Pavel Pisa authored
Update CTU CAN FD submodule = removed "dff" identifier which conflicts with QUARTUS predefined primitive. Merge branch '381-dff-entity-name-seems-to-conflict-with-quartus-prime-reserved-primitve-name' into 'master' Signed-off-by:
Pavel Pisa <pisa@cmp.felk.cvut.cz>
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Pavel Pisa authored
Each .PONY target in tche chain would result in unconditional rebuild, so no chance to reach state, where make reports nothing to be done. Dependencies of project result SOF file are taken from QUARTUS report. Regeneration of QUP is not correctly dependent on all CTU CAN FD files. To be sure that all is rebuild use make clean all Signed-off-by:
Pavel Pisa <pisa@cmp.felk.cvut.cz>
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- 14 Oct, 2020 5 commits
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Jaroslav Beran authored
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Jaroslav Beran authored
This file contains setup for the Quartus Convert Programming File utility. It converts the bitstream from SOF to RBF format, which is required for programming the FPGA of the SoC from U-Boot. The "mode" parameter is set to "Passive parallel x16" (cf. DE0-Nano-SoC User Manual, Table 3-2 MSEL Pin Settings for FPGA Configure of DE0-Nano-SoC) It can be used from command line: $ quartus_cpf -c conversion_setup_sof-to-rbf.cof Or from within Quartus IDE: File -> Convert Programming File
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Pavel Pisa authored
Replace list of files referenced by CTU CAN FD component ip/ctu_canfd/ctu_canfd_avalon_hw.tcl by the actual CTU CAN FD source files found in ctucanfd submodule. This setup ensures that changes in CTU CAN FD submodule are directly propagated into SoC design. There is problem that QSYS generated TCL file soc_system/synthesis/soc_system.qip commands to place all CTU CAN FD packages to be placed into "soc_system" library set_global_assignment -library "soc_system" -name VHDL_FILE [file join $::quartus(qip_path) "submodules/ctucanfd/can_constants.vhd"] but CTU CAN FD sources looks for CTU CAN FD packages in "ctu_can_fd_rtl" library. So the lines in QIP file should look like this set_global_assignment -library "ctu_can_fd_rtl" -name VHDL_FILE [file join $::quartus(qip_path) "submodules/ctucanfd/can_constants.vhd"] Signed-off-by:
Pavel Pisa <pisa@cmp.felk.cvut.cz>
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This work is part of diploma thesis Jaroslav Beran : Firmware for Control Module of an Intelligent Vehicle https://dspace.cvut.cz/bitstream/handle/10467/89957/F3-DP-2020-Beran-Jaroslav-beranj25_thesis.pdf Signed-off-by:
Jaroslav Beran <jara.beran@gmail.com>
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Pavel Pisa authored
Actual version tested on on Cyclone V 5CSEMA4U23C6 based Terasic board. This initial commit adds CTU CAN FD IP core submodule into project. Signed-off-by:
Pavel Pisa <pisa@cmp.felk.cvut.cz>
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