Commit 9674787f authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

Merge branch '244-separate-mode_settings-command_status' into 'master'

Resolve "Split MODE, SETTINGS, COMMAND, STATUS register"

Closes #244

See merge request !218
parents 0325d86c ede79e4b
Pipeline #6304 failed with stages
in 62 minutes and 52 seconds
This diff is collapsed.
......@@ -139,7 +139,7 @@ u32 ctu_can_fd_get_version(struct ctucanfd_priv *priv)
void ctu_can_fd_enable(struct ctucanfd_priv *priv, bool enable)
{
union ctu_can_fd_mode_command_status_settings reg;
union ctu_can_fd_mode_settings reg;
reg.u32 = priv->read_reg(priv, CTU_CAN_FD_MODE);
reg.s.ena = enable ? CTU_CAN_ENABLED : CTU_CAN_DISABLED;
......@@ -148,7 +148,7 @@ void ctu_can_fd_enable(struct ctucanfd_priv *priv, bool enable)
void ctu_can_fd_reset(struct ctucanfd_priv *priv)
{
union ctu_can_fd_mode_command_status_settings mode;
union ctu_can_fd_mode_settings mode;
mode.u32 = 0;
mode.s.rst = 1;
......@@ -160,7 +160,7 @@ void ctu_can_fd_reset(struct ctucanfd_priv *priv)
bool ctu_can_fd_set_ret_limit(struct ctucanfd_priv *priv, bool enable, u8 limit)
{
union ctu_can_fd_mode_command_status_settings reg;
union ctu_can_fd_mode_settings reg;
if (limit > CTU_CAN_FD_RETR_MAX)
return false;
......@@ -176,7 +176,7 @@ void ctu_can_fd_set_mode_reg(struct ctucanfd_priv *priv,
const struct can_ctrlmode *mode)
{
u32 flags = mode->flags;
union ctu_can_fd_mode_command_status_settings reg;
union ctu_can_fd_mode_settings reg;
reg.u32 = priv->read_reg(priv, CTU_CAN_FD_MODE);
......@@ -211,29 +211,29 @@ void ctu_can_fd_set_mode_reg(struct ctucanfd_priv *priv,
void ctu_can_fd_rel_rx_buf(struct ctucanfd_priv *priv)
{
union ctu_can_fd_mode_command_status_settings reg;
union ctu_can_fd_command reg;
reg.u32 = priv->read_reg(priv, CTU_CAN_FD_MODE);
reg.u32 = 0;
reg.s.rrb = 1;
priv->write_reg(priv, CTU_CAN_FD_MODE, reg.u32);
priv->write_reg(priv, CTU_CAN_FD_COMMAND, reg.u32);
}
void ctu_can_fd_clr_overrun_flag(struct ctucanfd_priv *priv)
{
union ctu_can_fd_mode_command_status_settings reg;
union ctu_can_fd_command reg;
reg.u32 = priv->read_reg(priv, CTU_CAN_FD_MODE);
reg.u32 = 0;
reg.s.cdo = 1;
priv->write_reg(priv, CTU_CAN_FD_MODE, reg.u32);
priv->write_reg(priv, CTU_CAN_FD_COMMAND, reg.u32);
}
void ctu_can_fd_abort_tx(struct ctucanfd_priv *priv)
{
union ctu_can_fd_mode_command_status_settings reg;
union ctu_can_fd_command reg;
reg.u32 = priv->read_reg(priv, CTU_CAN_FD_MODE);
reg.u32 = 0;
reg.s.abt = 1;
priv->write_reg(priv, CTU_CAN_FD_MODE, reg.u32);
priv->write_reg(priv, CTU_CAN_FD_COMMAND, reg.u32);
}
// TODO: rather than set(value, mask) interface, provide
......
......@@ -291,13 +291,13 @@ void ctu_can_fd_abort_tx(struct ctucanfd_priv *priv);
* Returns:
* Mode/status structure with multiple mode flags.
*/
static inline union ctu_can_fd_mode_command_status_settings
static inline union ctu_can_fd_status
ctu_can_get_status(struct ctucanfd_priv *priv)
{
/* MODE and STATUS are within the same word */
union ctu_can_fd_mode_command_status_settings res;
union ctu_can_fd_status res;
res.u32 = priv->read_reg(priv, CTU_CAN_FD_MODE);
res.u32 = priv->read_reg(priv, CTU_CAN_FD_STATUS);
return res;
}
......@@ -313,7 +313,7 @@ static inline union ctu_can_fd_mode_command_status_settings
*/
static inline bool ctu_can_fd_is_enabled(struct ctucanfd_priv *priv)
{
union ctu_can_fd_mode_command_status_settings reg;
union ctu_can_fd_mode_settings reg;
reg.u32 = priv->read_reg(priv, CTU_CAN_FD_MODE);
return reg.s.ena == CTU_CAN_ENABLED;
......
......@@ -43,52 +43,52 @@ enum ctu_can_fd_can_registers {
CTU_CAN_FD_DEVICE_ID = 0x0,
CTU_CAN_FD_VERSION = 0x2,
CTU_CAN_FD_MODE = 0x4,
CTU_CAN_FD_COMMAND = 0x5,
CTU_CAN_FD_STATUS = 0x6,
CTU_CAN_FD_SETTINGS = 0x7,
CTU_CAN_FD_INT_STAT = 0x8,
CTU_CAN_FD_INT_ENA_SET = 0xc,
CTU_CAN_FD_INT_ENA_CLR = 0x10,
CTU_CAN_FD_INT_MASK_SET = 0x14,
CTU_CAN_FD_INT_MASK_CLR = 0x18,
CTU_CAN_FD_BTR = 0x1c,
CTU_CAN_FD_BTR_FD = 0x20,
CTU_CAN_FD_EWL = 0x24,
CTU_CAN_FD_ERP = 0x25,
CTU_CAN_FD_FAULT_STATE = 0x26,
CTU_CAN_FD_RXC = 0x28,
CTU_CAN_FD_TXC = 0x2a,
CTU_CAN_FD_ERR_NORM = 0x2c,
CTU_CAN_FD_ERR_FD = 0x2e,
CTU_CAN_FD_CTR_PRES = 0x30,
CTU_CAN_FD_FILTER_A_MASK = 0x34,
CTU_CAN_FD_FILTER_A_VAL = 0x38,
CTU_CAN_FD_FILTER_B_MASK = 0x3c,
CTU_CAN_FD_FILTER_B_VAL = 0x40,
CTU_CAN_FD_FILTER_C_MASK = 0x44,
CTU_CAN_FD_FILTER_C_VAL = 0x48,
CTU_CAN_FD_FILTER_RAN_LOW = 0x4c,
CTU_CAN_FD_FILTER_RAN_HIGH = 0x50,
CTU_CAN_FD_FILTER_CONTROL = 0x54,
CTU_CAN_FD_FILTER_STATUS = 0x56,
CTU_CAN_FD_RX_MEM_INFO = 0x58,
CTU_CAN_FD_RX_POINTERS = 0x5c,
CTU_CAN_FD_RX_STATUS = 0x60,
CTU_CAN_FD_RX_SETTINGS = 0x62,
CTU_CAN_FD_RX_DATA = 0x64,
CTU_CAN_FD_TX_STATUS = 0x68,
CTU_CAN_FD_TX_COMMAND = 0x6c,
CTU_CAN_FD_TX_PRIORITY = 0x70,
CTU_CAN_FD_ERR_CAPT = 0x74,
CTU_CAN_FD_ALC = 0x75,
CTU_CAN_FD_TRV_DELAY = 0x78,
CTU_CAN_FD_SSP_CFG = 0x7a,
CTU_CAN_FD_RX_COUNTER = 0x7c,
CTU_CAN_FD_TX_COUNTER = 0x80,
CTU_CAN_FD_DEBUG_REGISTER = 0x84,
CTU_CAN_FD_YOLO_REG = 0x88,
CTU_CAN_FD_TIMESTAMP_LOW = 0x90,
CTU_CAN_FD_TIMESTAMP_HIGH = 0x94,
CTU_CAN_FD_SETTINGS = 0x6,
CTU_CAN_FD_STATUS = 0x8,
CTU_CAN_FD_COMMAND = 0xc,
CTU_CAN_FD_INT_STAT = 0x10,
CTU_CAN_FD_INT_ENA_SET = 0x14,
CTU_CAN_FD_INT_ENA_CLR = 0x18,
CTU_CAN_FD_INT_MASK_SET = 0x1c,
CTU_CAN_FD_INT_MASK_CLR = 0x20,
CTU_CAN_FD_BTR = 0x24,
CTU_CAN_FD_BTR_FD = 0x28,
CTU_CAN_FD_EWL = 0x2c,
CTU_CAN_FD_ERP = 0x2d,
CTU_CAN_FD_FAULT_STATE = 0x2e,
CTU_CAN_FD_RXC = 0x30,
CTU_CAN_FD_TXC = 0x32,
CTU_CAN_FD_ERR_NORM = 0x34,
CTU_CAN_FD_ERR_FD = 0x36,
CTU_CAN_FD_CTR_PRES = 0x38,
CTU_CAN_FD_FILTER_A_MASK = 0x3c,
CTU_CAN_FD_FILTER_A_VAL = 0x40,
CTU_CAN_FD_FILTER_B_MASK = 0x44,
CTU_CAN_FD_FILTER_B_VAL = 0x48,
CTU_CAN_FD_FILTER_C_MASK = 0x4c,
CTU_CAN_FD_FILTER_C_VAL = 0x50,
CTU_CAN_FD_FILTER_RAN_LOW = 0x54,
CTU_CAN_FD_FILTER_RAN_HIGH = 0x58,
CTU_CAN_FD_FILTER_CONTROL = 0x5c,
CTU_CAN_FD_FILTER_STATUS = 0x5e,
CTU_CAN_FD_RX_MEM_INFO = 0x60,
CTU_CAN_FD_RX_POINTERS = 0x64,
CTU_CAN_FD_RX_STATUS = 0x68,
CTU_CAN_FD_RX_SETTINGS = 0x6a,
CTU_CAN_FD_RX_DATA = 0x6c,
CTU_CAN_FD_TX_STATUS = 0x70,
CTU_CAN_FD_TX_COMMAND = 0x74,
CTU_CAN_FD_TX_PRIORITY = 0x78,
CTU_CAN_FD_ERR_CAPT = 0x7c,
CTU_CAN_FD_ALC = 0x7e,
CTU_CAN_FD_TRV_DELAY = 0x80,
CTU_CAN_FD_SSP_CFG = 0x82,
CTU_CAN_FD_RX_COUNTER = 0x84,
CTU_CAN_FD_TX_COUNTER = 0x88,
CTU_CAN_FD_DEBUG_REGISTER = 0x8c,
CTU_CAN_FD_YOLO_REG = 0x90,
CTU_CAN_FD_TIMESTAMP_LOW = 0x94,
CTU_CAN_FD_TIMESTAMP_HIGH = 0x98,
CTU_CAN_FD_TXTB1_DATA_1 = 0x100,
CTU_CAN_FD_TXTB1_DATA_2 = 0x104,
CTU_CAN_FD_TXTB1_DATA_20 = 0x14c,
......@@ -133,9 +133,9 @@ enum ctu_can_fd_device_id_device_id {
CTU_CAN_FD_ID = 0xcafd,
};
union ctu_can_fd_mode_command_status_settings {
union ctu_can_fd_mode_settings {
uint32_t u32;
struct ctu_can_fd_mode_command_status_settings_s {
struct ctu_can_fd_mode_settings_s {
#ifdef __LITTLE_ENDIAN_BITFIELD
/* MODE */
uint32_t rst : 1;
......@@ -146,52 +146,22 @@ union ctu_can_fd_mode_command_status_settings {
uint32_t rtrp : 1;
uint32_t tsm : 1;
uint32_t acf : 1;
uint32_t reserved_8 : 1;
/* COMMAND */
uint32_t abt : 1;
uint32_t rrb : 1;
uint32_t cdo : 1;
uint32_t ercrst : 1;
uint32_t rxfcrst : 1;
uint32_t txfcrst : 1;
uint32_t reserved_15 : 1;
/* STATUS */
uint32_t rxne : 1;
uint32_t dor : 1;
uint32_t txnf : 1;
uint32_t eft : 1;
uint32_t rxs : 1;
uint32_t txs : 1;
uint32_t ewl : 1;
uint32_t idle : 1;
uint32_t reserved_15_8 : 8;
/* SETTINGS */
uint32_t rtrle : 1;
uint32_t rtrth : 4;
uint32_t ilbp : 1;
uint32_t ena : 1;
uint32_t nisofd : 1;
uint32_t reserved_31_24 : 8;
#else
uint32_t reserved_31_24 : 8;
uint32_t nisofd : 1;
uint32_t ena : 1;
uint32_t ilbp : 1;
uint32_t rtrth : 4;
uint32_t rtrle : 1;
uint32_t idle : 1;
uint32_t ewl : 1;
uint32_t txs : 1;
uint32_t rxs : 1;
uint32_t eft : 1;
uint32_t txnf : 1;
uint32_t dor : 1;
uint32_t rxne : 1;
uint32_t reserved_15 : 1;
uint32_t txfcrst : 1;
uint32_t rxfcrst : 1;
uint32_t ercrst : 1;
uint32_t cdo : 1;
uint32_t rrb : 1;
uint32_t abt : 1;
uint32_t reserved_8 : 1;
uint32_t reserved_15_8 : 8;
uint32_t acf : 1;
uint32_t tsm : 1;
uint32_t rtrp : 1;
......@@ -259,6 +229,60 @@ enum ctu_can_fd_settings_nisofd {
NON_ISO_FD = 0x1,
};
union ctu_can_fd_status {
uint32_t u32;
struct ctu_can_fd_status_s {
#ifdef __LITTLE_ENDIAN_BITFIELD
/* STATUS */
uint32_t rxne : 1;
uint32_t dor : 1;
uint32_t txnf : 1;
uint32_t eft : 1;
uint32_t rxs : 1;
uint32_t txs : 1;
uint32_t ewl : 1;
uint32_t idle : 1;
uint32_t reserved_31_8 : 24;
#else
uint32_t reserved_31_8 : 24;
uint32_t idle : 1;
uint32_t ewl : 1;
uint32_t txs : 1;
uint32_t rxs : 1;
uint32_t eft : 1;
uint32_t txnf : 1;
uint32_t dor : 1;
uint32_t rxne : 1;
#endif
} s;
};
union ctu_can_fd_command {
uint32_t u32;
struct ctu_can_fd_command_s {
#ifdef __LITTLE_ENDIAN_BITFIELD
uint32_t reserved_0 : 1;
/* COMMAND */
uint32_t abt : 1;
uint32_t rrb : 1;
uint32_t cdo : 1;
uint32_t ercrst : 1;
uint32_t rxfcrst : 1;
uint32_t txfcrst : 1;
uint32_t reserved_31_7 : 25;
#else
uint32_t reserved_31_7 : 25;
uint32_t txfcrst : 1;
uint32_t rxfcrst : 1;
uint32_t ercrst : 1;
uint32_t cdo : 1;
uint32_t rrb : 1;
uint32_t abt : 1;
uint32_t reserved_0 : 1;
#endif
} s;
};
union ctu_can_fd_int_stat {
uint32_t u32;
struct ctu_can_fd_int_stat_s {
......@@ -803,14 +827,16 @@ union ctu_can_fd_err_capt_alc {
/* ERR_CAPT */
uint32_t err_pos : 5;
uint32_t err_type : 3;
uint32_t reserved_15_8 : 8;
/* ALC */
uint32_t alc_bit : 5;
uint32_t alc_id_field : 3;
uint32_t reserved_31_16 : 16;
uint32_t reserved_31_24 : 8;
#else
uint32_t reserved_31_16 : 16;
uint32_t reserved_31_24 : 8;
uint32_t alc_id_field : 3;
uint32_t alc_bit : 5;
uint32_t reserved_15_8 : 8;
uint32_t err_type : 3;
uint32_t err_pos : 5;
#endif
......
......@@ -252,8 +252,8 @@ int main(int argc, char *argv[])
addrs[0] = pci_find_bar(0x1172, 0xcafd, 0, 1);
if (!addrs[0])
addrs[0] = pci_find_bar(0x1760, 0xff00, 0, 1);
if (!addrs[0])
err(1, "-p PCI device not found");
if (!addrs[0])
err(1, "-p PCI device not found");
addrs[1] = addrs[0] + 0x4000;
break;
case 'h':
......@@ -323,7 +323,7 @@ int main(int argc, char *argv[])
ctu_can_fd_reset(priv);
{
union ctu_can_fd_mode_command_status_settings mode;
union ctu_can_fd_mode_settings mode;
mode.u32 = priv->read_reg(priv, CTU_CAN_FD_MODE);
if (mode.s.ena) {
......@@ -423,8 +423,8 @@ int main(int argc, char *argv[])
u32 rxsz = reg.s.rx_buff_size - reg.s.rx_mem_free;
printf("%u RX frames, %u words", nrxf, rxsz);
printf(", status 0x%02hhx", ctu_can_fd_read8(priv, CTU_CAN_FD_STATUS));
printf(", settings 0x%02hhx", ctu_can_fd_read8(priv, CTU_CAN_FD_SETTINGS));
printf(", status 0x%08hhx", ctu_can_fd_read32(priv, CTU_CAN_FD_STATUS));
printf(", settings 0x%04hhx", ctu_can_fd_read16(priv, CTU_CAN_FD_SETTINGS));
printf(", INT_STAT 0x%04hhx", ctu_can_fd_read16(priv, CTU_CAN_FD_INT_STAT));
printf(", INT_ENA_SET 0x%04hx", priv->read_reg(priv, CTU_CAN_FD_INT_ENA_SET));
printf(", INT_MASK_SET 0x%04hx", priv->read_reg(priv, CTU_CAN_FD_INT_MASK_SET));
......
This diff is collapsed.
......@@ -50,9 +50,9 @@ use ieee.std_logic_1164.all;
package can_registers_pkg is
type Control_registers_out_t is record
mode : std_logic_vector(7 downto 0);
command : std_logic_vector(7 downto 0);
settings : std_logic_vector(7 downto 0);
mode : std_logic_vector(15 downto 0);
settings : std_logic_vector(15 downto 0);
command : std_logic_vector(31 downto 0);
int_stat : std_logic_vector(15 downto 0);
int_ena_set : std_logic_vector(15 downto 0);
int_ena_clr : std_logic_vector(15 downto 0);
......@@ -83,7 +83,7 @@ package can_registers_pkg is
type Control_registers_in_t is record
device_id : std_logic_vector(15 downto 0);
version : std_logic_vector(15 downto 0);
status : std_logic_vector(7 downto 0);
status : std_logic_vector(31 downto 0);
int_stat : std_logic_vector(15 downto 0);
int_ena_set : std_logic_vector(15 downto 0);
int_mask_set : std_logic_vector(15 downto 0);
......
......@@ -291,7 +291,7 @@ architecture rtl of memory_registers is
signal Event_Logger_in : Event_Logger_in_t;
-- Status register - combinational decoder
signal status_comb : std_logic_vector(7 downto 0);
signal status_comb : std_logic_vector(31 downto 0);
-- Padding for interrupt read data
constant INT_PAD_H_IND : natural :=
......@@ -547,45 +547,46 @@ begin
---------------------------------------------------------------------------
-- Status register - combinational decoder
---------------------------------------------------------------------------
status_comb(IDLE_IND mod 8) <= '1' when (error_state = bus_off) else
'1' when (OP_State = integrating) else
'1' when (OP_State = idle) else
'0';
status_comb(EWL_IND mod 8) <= '1' when
(control_registers_out.ewl
<
stat_bus(STAT_TX_COUNTER_HIGH downto
STAT_TX_COUNTER_LOW) or
(control_registers_out.ewl
<
stat_bus(STAT_RX_COUNTER_HIGH downto
STAT_RX_COUNTER_LOW)))
else
'0';
status_comb(TXS_IND mod 8) <= '1' when (OP_State = transciever) else
'0';
status_comb(RXS_IND mod 8) <= '1' when (OP_State = reciever) else
'0';
status_comb(TXNF_IND mod 8) <= '1' when (txtb_state(0) = TXT_ETY or
txtb_state(1) = TXT_ETY or
txtb_state(2) = TXT_ETY or
txtb_state(3) = TXT_ETY)
else
'0';
status_comb(IDLE_IND) <= '1' when (error_state = bus_off) else
'1' when (OP_State = integrating) else
'1' when (OP_State = idle) else
'0';
status_comb(EWL_IND) <= '1' when
(control_registers_out.ewl
<
stat_bus(STAT_TX_COUNTER_HIGH downto
STAT_TX_COUNTER_LOW) or
(control_registers_out.ewl
<
stat_bus(STAT_RX_COUNTER_HIGH downto
STAT_RX_COUNTER_LOW)))
else
'0';
status_comb(TXS_IND) <= '1' when (OP_State = transciever) else
'0';
status_comb(RXS_IND) <= '1' when (OP_State = reciever) else
'0';
status_comb(TXNF_IND) <= '1' when (txtb_state(0) = TXT_ETY or
txtb_state(1) = TXT_ETY or
txtb_state(2) = TXT_ETY or
txtb_state(3) = TXT_ETY)
else
'0';
-- When at least one message is availiable in the buffer
status_comb(RXNE_IND mod 8) <= not rx_empty;
status_comb(RXNE_IND) <= not rx_empty;
status_comb(DOR_IND mod 8) <= rx_data_overrun;
status_comb(DOR_IND) <= rx_data_overrun;
status_comb(EFT_IND mod 8) <= '1' when (PC_state = error)
else
'0';
status_comb(EFT_IND) <= '1' when (PC_state = error)
else
'0';
status_comb(31 downto 8) <= (others => '0');
----------------------------------------------------------------------------
----------------------------------------------------------------------------
......
......@@ -2795,14 +2795,14 @@ package body CANtestLib is
variable data : std_logic_vector(31 downto 0) :=
(OTHERS => '0');
begin
CAN_read(data, MODE_ADR, ID, mem_bus);
CAN_read(data, SETTINGS_ADR, ID, mem_bus, BIT_16);
if enable then
data(RTRLE_IND) := '1';
else
data(RTRLE_IND) := '0';
end if;
data(RTRTH_H downto RTRTH_L) := std_logic_vector(to_unsigned(limit, 4));
CAN_write(data, MODE_ADR, ID, mem_bus);
CAN_write(data, SETTINGS_ADR, ID, mem_bus, BIT_16);
end procedure;
......@@ -3454,15 +3454,15 @@ package body CANtestLib is
begin
-- Wait until unit starts to transmitt or reciesve
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
while (r_data(RXS_IND) = '0' and r_data(TXS_IND) = '0') loop
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
end loop;
-- Wait until bus is idle now
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
while (r_data(IDLE_IND) = '0') loop
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
end loop;
end procedure;
......@@ -3476,9 +3476,9 @@ package body CANtestLib is
(OTHERS => '0');
begin
-- Wait until bus is idle
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
while (r_data(IDLE_IND) = '0') loop
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
end loop;
end procedure;
......@@ -3491,15 +3491,15 @@ package body CANtestLib is
(OTHERS => '0');
begin
-- Wait until unit starts to transmitt or recieve
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
while (r_data(RXS_IND) = '0' and r_data(TXS_IND) = '0') loop
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
end loop;
-- Wait until error frame is not being transmitted
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
while (r_data(EFT_IND) = '0') loop
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
end loop;
end procedure;
......@@ -3552,7 +3552,7 @@ package body CANtestLib is
begin
-- Wait until unit starts to transmitt or recieve
while (true) loop
CAN_read(r_data, MODE_ADR, ID, mem_bus);
CAN_read(r_data, STATUS_ADR, ID, mem_bus);
if (exit_trans and r_data(TXS_IND) = '1') then
exit;
end if;
......@@ -3782,10 +3782,10 @@ package body CANtestLib is
data(ACF_IND) := '1';
end if;
CAN_write(data, MODE_ADR, ID, mem_bus, BIT_8);
CAN_write(data, MODE_ADR, ID, mem_bus, BIT_16);
-- Following modes are stored in SETTINGS register
CAN_read(data, SETTINGS_ADR, ID, mem_bus, BIT_8);
CAN_read(data, SETTINGS_ADR, ID, mem_bus, BIT_16);
if (mode.iso_fd_support) then
data(NISOFD_IND) := '0';
......@@ -3799,7 +3799,7 @@ package body CANtestLib is
data(ILBP_IND) := '0';
end if;
CAN_write(data, SETTINGS_ADR, ID, mem_bus, BIT_8);
CAN_write(data, SETTINGS_ADR, ID, mem_bus, BIT_16);
end procedure;
......@@ -3906,7 +3906,7 @@ package body CANtestLib is
data(CDO_IND) := '1';
end if;
CAN_write(data, COMMAND_ADR, ID, mem_bus, BIT_8);
CAN_write(data, COMMAND_ADR, ID, mem_bus, BIT_32);
end procedure;
......@@ -3917,7 +3917,7 @@ package body CANtestLib is
) is
variable data : std_logic_vector(31 downto 0);
begin
CAN_read(data, STATUS_ADR, ID, mem_bus, BIT_8);
CAN_read(data, STATUS_ADR, ID, mem_bus, BIT_32);
status.receive_buffer := false;
status.data_overrun := false;
......@@ -3970,18 +3970,18 @@ package body CANtestLib is
) is
variable data : std_logic_vector(31 downto 0);
begin
CAN_read(data, SETTINGS_ADR, ID, mem_bus, BIT_8);
CAN_read(data, SETTINGS_ADR, ID, mem_bus, BIT_16);
if (enable) then
data(ENA_IND) := '1';
data(RTRLE_IND) := '1';
else
data(ENA_IND) := '0';
data(RTRLE_IND) := '0';
end if;
data(RTRTH_H downto RTRTH_L) :=
std_logic_vector(to_unsigned(limit, RTRTH_H - RTRTH_L + 1));
CAN_write(data, SETTINGS_ADR, ID, mem_bus, BIT_8);
CAN_write(data, SETTINGS_ADR, ID, mem_bus, BIT_16);
end procedure;
......@@ -3992,7 +3992,7 @@ package body CANtestLib is
) is
variable data : std_logic_vector(31 downto 0);
begin
CAN_read(data, SETTINGS_ADR, ID, mem_bus, BIT_8);
CAN_read(data, SETTINGS_ADR, ID, mem_bus, BIT_16);
if (enable) then
data(ENA_IND) := '1';
......@@ -4000,7 +4000,7 @@ package body CANtestLib is
data(ENA_IND) := '0';
end if;
CAN_write(data, SETTINGS_ADR, ID, mem_bus, BIT_8);
CAN_write(data, SETTINGS_ADR, ID, mem_bus, BIT_16);
end procedure;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment