design: replace tx_data shift reg with fifo cache.
Implement TX Data Cache (FIFO like). TX Data are stored at the time of regular sample point and read at the time of secondary sample point. Signed-off-by: Ille, Ondrej, Ing <email@example.com>
230-can-fd-tx-bit-error-detection-optimization in 12 minutes (queued for 4 seconds)4 jobs for