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CTU CAN FD IP Core
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Label priority
driver: remove original definitions of IDs which re not used now.
!200
· created
Jan 14, 2019
by
Pavel Pisa
Merged
0
updated
Jan 14, 2019
driver: add reserved vendor and device ID and identification register.
!199
· created
Jan 14, 2019
by
Pavel Pisa
Merged
0
updated
Jan 14, 2019
driver: add measurement of write access time to userspace test application.
!198
· created
Jan 13, 2019
by
Pavel Pisa
Merged
0
updated
Jan 13, 2019
update links to new repository
!197
· created
Jan 10, 2019
by
Martin Jeřábek
Merged
0
updated
Jan 10, 2019
ci: do not include huge binaries in artifacts
!196
· created
Jan 10, 2019
by
Martin Jeřábek
Merged
0
updated
Jan 10, 2019
Resolve "Align TIMESTAMP to 64 bit Address"
!195
· created
Jan 10, 2019
by
Ille, Ondrej, Ing.
ISO optimizations
Merged
0
updated
Jan 10, 2019
Driver formating
!194
· created
Jan 10, 2019
by
Pavel Pisa
Merged
0
updated
Jan 10, 2019
doc: Avalon/APB typo fix.
!193
· created
Jan 09, 2019
by
Ille, Ondrej, Ing.
Merged
0
updated
Jan 09, 2019
Resolve "Regmap gen saturation fix."
!192
· created
Jan 08, 2019
by
Ille, Ondrej, Ing.
ISO optimizations
Doing
Merged
0
updated
Jan 08, 2019
Resolve "Accustomize reg.map gen"
!191
· created
Jan 08, 2019
by
Ille, Ondrej, Ing.
Merged
0
updated
Jan 08, 2019
Resolve "Update Quartus CTU CAN FD core benchmark project."
!190
· created
Jan 07, 2019
by
Pavel Pisa
Merged
0
updated
Jan 07, 2019
Resolve "vivado component: update to match bus_sampling changes."
!189
· created
Jan 07, 2019
by
Pavel Pisa
Merged
0
updated
Jan 07, 2019
Resolve VHDL 2008 is not supported in Vivado IP packager still .
!188
· created
Jan 06, 2019
by
Pavel Pisa
Merged
1
updated
Jan 07, 2019
SRC REGISTERS Fixed reset.
!187
· created
Jan 06, 2019
by
Ille, Ondrej, Ing.
ISO optimizations
Merged
0
updated
Jan 06, 2019
TEST ALL Added Reg.map waves.
!186
· created
Jan 06, 2019
by
Ille, Ondrej, Ing.
Test improvements
Doing
Merged
0
updated
Jan 06, 2019
Added explicit warning to register descriptions. Some registers are
!185
· created
Jan 06, 2019
by
Ille, Ondrej, Ing.
ISO optimizations
Merged
4
updated
Jan 06, 2019
Fixed MODE[RST] does not autoclear.
!184
· created
Jan 06, 2019
by
Ille, Ondrej, Ing.
Merged
0
updated
Jan 06, 2019
Resolve "SSP offset"
!183
· created
Jan 06, 2019
by
Ille, Ondrej, Ing.
ISO optimizations
Doing
Merged
0
updated
Jan 06, 2019
testfw: improvements
!181
· created
Jan 05, 2019
by
Martin Jeřábek
Merged
0
updated
Jan 05, 2019
Adapt canbench-sw and CTU_CAN_FD Vivado component to match sources after 207-design-decoupling merge
!180
· created
Jan 05, 2019
by
Pavel Pisa
Merged
0
updated
Jan 05, 2019
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