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CTU CAN FD IP Core
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  • CTU CAN FD IP Core
  • Issues

  • Open 14
  • Closed 387
  • All 401
New issue
  • Priority Created date Last updated Milestone due date Due date Popularity Label priority Manual
  • CI: Publish coverage results on gitlab pages
    #140 · opened May 22, 2018 by Martin Jeřábek   Continuous integration
    • CLOSED
    • 2
    • 1
    updated May 24, 2018
  • ghdl unit tests: only one unit test in run for all testcases
    #141 · opened May 24, 2018 by Martin Jeřábek
    • CLOSED
    • 1
    • 1
    updated May 24, 2018
  • VHDL feedback replacement with proper clock enable on flip flops
    #60 · opened Jan 20, 2018 by Ille, Ondrej, Ing.   Bug fixing   To Do
    • CLOSED
    • 2
    updated May 20, 2018
  • Byte enable in the test framework
    #78 · opened Feb 06, 2018 by Ille, Ondrej, Ing.   Test maintenance
    • CLOSED
    • 1
    updated May 20, 2018
  • Buffer Data endianess
    #134 · opened May 17, 2018 by Ille, Ondrej, Ing.   Bug fixing   Doing
    • CLOSED
    • 1
    • 0
    updated May 19, 2018
  • Endian fix
    #133 · opened May 17, 2018 by Ille, Ondrej, Ing.   Bug fixing   Doing
    • CLOSED
    • 1
    • 1
    updated May 19, 2018
  • Separate RX Buffer write pointers
    #68 · opened Jan 29, 2018 by Ille, Ondrej, Ing.   Wishlist   Doing
    • CLOSED
    • 1
    • 1
    updated May 19, 2018
  • Rewrite AXI wrapper to be fully synchronous
    #131 · opened May 09, 2018 by Martin Jeřábek   Rejected
    • CLOSED
    • 3
    updated May 18, 2018
  • AXI Wrapper unit test
    #71 · opened Feb 05, 2018 by Ille, Ondrej, Ing.   Test maintenance
    • CLOSED
    • 2
    updated May 18, 2018
  • Add TXT Buffer protection
    #101 · opened Mar 15, 2018 by Ille, Ondrej, Ing.   Bug fixing   Rejected
    • CLOSED
    • 1
    updated May 08, 2018
  • Make canfd_registers fully duplex for AXI compatibility
    #82 · opened Feb 06, 2018 by Martin Jeřábek   Xilinx AXI wrapper   Rejected
    • CLOSED
    • 3
    updated May 02, 2018
  • Software reset via MODE[RST] should reset the whole core
    #124 · opened Apr 24, 2018 by Martin Jeřábek   Bug fixing
    • CLOSED
    • 1
    • 2
    updated Apr 24, 2018
  • Wrapper creation
    #30 · opened Dec 06, 2017 by Ille, Ondrej, Ing.   Xilinx AXI wrapper
    • CLOSED
    • 1
    • 0
    updated Apr 24, 2018
  • Xilinx AXI research
    #29 · opened Dec 06, 2017 by Ille, Ondrej, Ing.   Xilinx AXI wrapper
    • CLOSED
    • 1
    • 0
    updated Apr 24, 2018
  • Transceiver delay
    #102 · opened Mar 19, 2018 by Ille, Ondrej, Ing.   Bug fixing   Doing
    • CLOSED
    • 1
    • 0
    updated Apr 20, 2018
  • TXT Buffer assertion corruptions
    #110 · opened Apr 15, 2018 by Ille, Ondrej, Ing.   Test maintenance   Doing
    • CLOSED
    • 1
    • 0
    updated Apr 20, 2018
  • Interrupt unit test
    #111 · opened Apr 15, 2018 by Ille, Ondrej, Ing.   Test maintenance   Doing
    • CLOSED
    • 1
    • 0
    updated Apr 20, 2018
  • Interrupt enable, mask bug-fix
    #123 · opened Apr 19, 2018 by Ille, Ondrej, Ing.   Bug fixing   Doing
    • CLOSED
    • 1
    • 0
    updated Apr 19, 2018
  • Sanity test failing
    #121 · opened Apr 16, 2018 by Martin Jeřábek   Bug fixing
    • CLOSED
    • 2
    updated Apr 18, 2018
  • fix byte enable
    #119 · opened Apr 16, 2018 by Martin Jeřábek   Bug fixing
    • CLOSED
    • 1
    • 0
    updated Apr 18, 2018
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