TX arbitrator optimization
TX arbitrator now loads data from TXT buffer in circular manner during TXT buffer validation process.
By this I mean that timestamp words are read, timestamp comparison is executed, frame format word is read and loaded to capture registers. Then, the same procedure repeats even if this does not have sense because the same data will be selected. The procedure shall be restarted only when Selected TXT Buffer changes because then new frame can be loaded. Power-wise reading from such a big RAM data again and again redundantly is not very good approach (even for FPGAs)