Interfacing CAN FD core to PCI Express bus
The Devboards Gmb DB4CGX15 board has been used for the work. The board is based on Intel/Altera EP4CGX15 Cyclone IV FPGA. Addon IO expander with CAN FD transceiver has been used. It has been initially designed at PiKRON Ltd. for A0B36APO course semestral work.
Unmodified CTU CAN FD core has been included in separated project PCIe CTU CAN FD. Quartus QSYS is used to map the core over Avalon to External Bus Bridge to IP_Compiler for PCI Express hard PCIe core to PCIe bus.
The project contains design files, configuration files and scripts to test PCIe design and to program device by Qurtus and indepedently by commandline UrJTAG open-source tool.
PCIe support has been implemented for CTU CAN FD driver and result has been integrated to main CTU CAN FD repository.