add registers for reading current timestamp
Strictly speaking the timestamp is from external source, which should provide CPU access to the value itself (either read-only or dead-write). However, the engineers at Xilinx apparently reasoned similarly when designing Xilinx CAN and the counter value is inaccessible there - at all. So it would be nice to have read-only access to it via the CAN core in case the integrator forgets to make it accessible from the counter directly again. As a bonus, it will be simpler to handle the timestamps in Linux driver, because it will not have to depend on an external timer.
Will be useful for #158 (closed).