At the moment interrupts work as following:
- INT_STAT_RAW: raw intrerupt status, independent of enable/mask (not exposed at the moment)
- INT_STAT = INT_STAT_RAW & INT_ENA (acc to datasheet should be INT_MASK instead)
- irq generated if INT_STAT_RAW & INT_ENA & INT_MASK
Issue 1: Swapped INT_ENA, INT_MASK.
Issue 2: The mask sense is reversed. Usually when an interrupt bit is masked, it means that it does not cause irq generation.
Issue 3: The value of INT_MASK is questionable. Basically we have 2 settings doing the same thing (enabling IRQ generation), which is useless (correct me if I am wrong). I would also like more if INT_STAT was completely unmasked, i.e. equal to INT_STAT_RAW. If the masked variant should be desired, it should be masked solely by INT_ENA and INT_MASK would be removed. It remains to be decided whether we should have (INT_STAT, INT_STAT_MASKED) or (INT_STAT_RAW, INT_STAT), that is if we keep the masked variant at all.
It could make sense to mask irq generation from particular TX buffers - then the TXBHCI bit would not be set if the particular buffer irqs were masked. Here the unmasked _RAW variant of the status register would not make sense. However, I do not see much value in this for now, so I would just propose the following:
- remove INT_MASK
- do not mask INT_STATUS