CTU CAN FD IP Core issueshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues2018-04-05T10:48:23Zhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/91Stabilize register map2018-04-05T10:48:23ZIlle, Ondrej, Ing.Stabilize register mapAfter all updates in the register map, go through every register and decide whether its location is final.
Discuss this with Martin and mr. Píša.After all updates in the register map, go through every register and decide whether its location is final.
Discuss this with Martin and mr. Píša.Socket CAN release featureshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/92Documentation split2018-04-05T10:48:23ZIlle, Ondrej, Ing.Documentation splitSplit the system architecture Chapter into the general part with block diagrams and written description.
The other chapter will be with Tables describing each circuit. Consider putting the second chapter to Appendix.Split the system architecture Chapter into the general part with block diagrams and written description.
The other chapter will be with Tables describing each circuit. Consider putting the second chapter to Appendix.Socket CAN release featureshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/94Generate VHDL files documentation2019-09-26T21:23:46ZIlle, Ondrej, Ing.Generate VHDL files documentationActual documentation in Chapter "System architecture" contains tables with inputs and outputs which are hard to maintain manually.
These tables will be moved to appendix.
Extend the IP-XACT generator, or create a separate VHDL code docu...Actual documentation in Chapter "System architecture" contains tables with inputs and outputs which are hard to maintain manually.
These tables will be moved to appendix.
Extend the IP-XACT generator, or create a separate VHDL code documentator, which will fetch all VHDL source code files and generate these
tables for us!
There are some obscure things however! Every file then must have equal format of description in the file header. Every signal in the port would need to have exact description format, which is little bit more problematic.Wishlisthttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/96RX Buffer timestamp bug2018-02-22T15:26:24ZIlle, Ondrej, Ing.RX Buffer timestamp bugIn the actual logic of RX Buffer timestamp is stored in two consecutive clock cycles.
Image following situation:
Timestamp value :0x00000000FFFFFFFF, is reached at the same time as lower word is stored. 0xFFFFFFFF will be stored.
If the...In the actual logic of RX Buffer timestamp is stored in two consecutive clock cycles.
Image following situation:
Timestamp value :0x00000000FFFFFFFF, is reached at the same time as lower word is stored. 0xFFFFFFFF will be stored.
If the timestamp tick is 1 clock cycle, in the next clock cycle 0x0000000100000000 will the value of external timestamp-
Upper word 0x00000001 will be stored resulting in invalid timestamp of frame arrival: 0x00000001FFFFFFFF.
This should be fixed. The question is whether we can assume that timestamp will be always incremented by 1. In that case we can
monitor only the change in LSB of Upper word.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/98Logger separation2018-04-05T10:48:23ZIlle, Ondrej, Ing.Logger separationSeparate event logger into stand-alone memory location in IP-XACT to make room for Interrupt registers extension.Separate event logger into stand-alone memory location in IP-XACT to make room for Interrupt registers extension.Socket CAN release featureshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/99Event logger BRS bugfix2018-06-05T17:07:28ZIlle, Ondrej, Ing.Event logger BRS bugfixFix temporary logging of BRS event which is always logging bit-rate shift from NOMINAL to DATA.Fix temporary logging of BRS event which is always logging bit-rate shift from NOMINAL to DATA.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/89Frame unification2018-07-23T23:09:08ZIlle, Ondrej, Ing.Frame unificationAll CAN frame metadata (DLC, RTR, ...) are defined in separate signals in synthesizable design. In CAN test lib record type is used
for this purpose.
It would be good to define record for HW CAN frame (in CANConstants.vhd), and use it t...All CAN frame metadata (DLC, RTR, ...) are defined in separate signals in synthesizable design. In CAN test lib record type is used
for this purpose.
It would be good to define record for HW CAN frame (in CANConstants.vhd), and use it troughout the design for synthesis.
This would reduce the number of signals in the design and make the design more organized.Wishlisthttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/101Add TXT Buffer protection2018-05-08T21:47:39ZIlle, Ondrej, Ing.Add TXT Buffer protectionIt might be beneficial to completely ignore any kind of acccess to TXT Buffers once the buffers are locked (in TX Ready or TX In progress)...It might be beneficial to completely ignore any kind of acccess to TXT Buffers once the buffers are locked (in TX Ready or TX In progress)...Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/102Transceiver delay2018-04-20T13:16:01ZIlle, Ondrej, Ing.Transceiver delayTransceiver delay measurement is available directly from the register that is used for measurement.
This means that if user reads the value during the measurement an intermediate value of measuring counter
will be returned. This should b...Transceiver delay measurement is available directly from the register that is used for measurement.
This means that if user reads the value during the measurement an intermediate value of measuring counter
will be returned. This should be fixed. Additional register should be added. This register will be updated once the transceiver delay measurement is finished! Thus it will never happend that user would read random value between
0 and ACTUAL_DELAY.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/104Test run from command line2018-06-08T14:18:12ZIlle, Ondrej, Ing.Test run from command lineCreate a simple script which would start Modelsim from Linux command line (e.g. in Python),
and run the CAN Test framework completely in command line.Create a simple script which would start Modelsim from Linux command line (e.g. in Python),
and run the CAN Test framework completely in command line.Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/105Direct transmission of metadata from TXT Buffer2018-04-06T16:04:00ZIlle, Ondrej, Ing.Direct transmission of metadata from TXT BufferIn the actual implementation, the TX Arbitrator loads the metadata during two clock cycles into internal registers
and stores it to the output. At the start of Frame, CAN Core will lock the buffer, and tranBuffer will store metadata.
Si...In the actual implementation, the TX Arbitrator loads the metadata during two clock cycles into internal registers
and stores it to the output. At the start of Frame, CAN Core will lock the buffer, and tranBuffer will store metadata.
Since now, the whole TXT Buffer is implemented as single RAM memory. Data part of CAN Frame is already loaded from the
TXT Buffer via pointer. Metadata + Identifier are still stored in the internal TX Arbitrator registers, on TX arbitrator
outputs and also in tranBuffer.
The aim of this task is to:
1. Implement storing of metadata during SOF by access to TXT Buffer via pointer, instead of taking data from tranBuffer.
2. Implement loading of Identifier shift registers by access to TXT Buffer via pointer, instead of taking data from the registers.
3. If 1 an 2 are implemented, tranBuffer will be obsolete as well as loading Frame format word and identifier word by
TX Arbitrator (Timestamp still must be loaded though). This will simplify TX Arbitrator implementation and also save
some amount of logic!Wishlisthttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/106Simple driver in userspace2018-06-20T08:59:08ZMartin JeřábekSimple driver in userspaceCreate a simple userspace app to access the IP, using the low-level driver.Create a simple userspace app to access the IP, using the low-level driver.Martin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/107Developer manual2019-03-14T20:00:27ZIlle, Ondrej, Ing.Developer manualWrite manual on how to set-up workflow for development, how to use generator framework, etc...Write manual on how to set-up workflow for development, how to use generator framework, etc...Wishlisthttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/109Extend pyxact generator with VHDL access generation2018-12-09T16:30:04ZIlle, Ondrej, Ing.Extend pyxact generator with VHDL access generationWishlisthttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/113Coding style unification2018-07-09T15:20:20ZIlle, Ondrej, Ing.Coding style unificationMake sure that all the synthesizable sources codes have unified coding style with 4 spaces
indent.Make sure that all the synthesizable sources codes have unified coding style with 4 spaces
indent.Wishlisthttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/108Referrence test with Kvaser2018-06-28T17:57:00ZIlle, Ondrej, Ing.Referrence test with KvaserInstall Linux software for Kvaser CAN FD, use it to generate several
custom CAN Frames with different protocol options such as:
Normal, FD, RTR, NO RTR, frame with 15,17,21 bit CRC, with BRS
, without BRS.
Sample the final bit sequence b...Install Linux software for Kvaser CAN FD, use it to generate several
custom CAN Frames with different protocol options such as:
Normal, FD, RTR, NO RTR, frame with 15,17,21 bit CRC, with BRS
, without BRS.
Sample the final bit sequence by logic analyzer, store it to file,
and implement test which will transmitt the same CAN Frames as the
one transmitted by Kvaser, and compare the bit values with
Bit values from Kvaser.
Note that this test should provide some basic level testing with
reference controller in simulation!Test maintenanceIlle, Ondrej, Ing.Ille, Ondrej, Ing.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/154Extend basic unit test run2018-06-13T15:33:31ZIlle, Ondrej, Ing.Extend basic unit test runTest maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/45Feature test consolidation2018-06-13T15:14:20ZIlle, Ondrej, Ing.Feature test consolidationFind out problems in all feature tests after the optimization changes!Find out problems in all feature tests after the optimization changes!Test maintenanceIlle, Ondrej, Ing.Ille, Ondrej, Ing.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/115Hard sync in the EDL2018-05-31T17:27:44ZIlle, Ondrej, Ing.Hard sync in the EDLAccording to CAN FD specification Hard synchronisation should be performed in the EDL bit of CAN FD Frame.
In the actual implementation this Hard synchronisation is omitted since Prescaler did not support
Hard synchronisation in the midd...According to CAN FD specification Hard synchronisation should be performed in the EDL bit of CAN FD Frame.
In the actual implementation this Hard synchronisation is omitted since Prescaler did not support
Hard synchronisation in the middle of CAN Frame. In extreme cases (e.g. setting nominal SJW to 0) this could
cause improper operation and inability to receive CAN FD frames.
The aim of this task is to add Hard-synchronisation in the EDL bit of CAN FD Frame.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/117Remove obsolete config options2018-06-02T21:36:37ZIlle, Ondrej, Ing.Remove obsolete config optionsSince major savings in LUT consumption were achieved, following settings of the Core now become osbolete:
support_be
tx_time_sup
Remove these two options.Since major savings in LUT consumption were achieved, following settings of the Core now become osbolete:
support_be
tx_time_sup
Remove these two options.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/119fix byte enable2018-04-18T10:28:17ZMartin Jeřábekfix byte enableByte enable support for writing is broken.Byte enable support for writing is broken.Bug fixingMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/120bad range for txt_buf_ptr in core_top & CANcomponents2018-04-16T15:55:15ZMartin Jeřábekbad range for txt_buf_ptr in core_top & CANcomponentsForgotten update of signal range in some places.Forgotten update of signal range in some places.Martin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/121Sanity test failing2018-04-18T12:34:15ZMartin JeřábekSanity test failingError:
```
src/Buffers_Message_Handling/txtBuffer.vhd:369:21:@12470124600fs:(report error): Buffer not READY and LOCK occurred
```Error:
```
src/Buffers_Message_Handling/txtBuffer.vhd:369:21:@12470124600fs:(report error): Buffer not READY and LOCK occurred
```Bug fixingIlle, Ondrej, Ing.Ille, Ondrej, Ing.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/122Set up gitlab continuous integration (CI)2018-05-24T19:23:23ZMartin JeřábekSet up gitlab continuous integration (CI)Set up basic CI/CD to run short sanity test after each commit. For now, use the available shared runner.Set up basic CI/CD to run short sanity test after each commit. For now, use the available shared runner.Continuous integrationMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/123Interrupt enable, mask bug-fix2018-04-19T16:38:12ZIlle, Ondrej, Ing.Interrupt enable, mask bug-fixFix missing propagation of internal "int_mask" and "int_ena_reg" to the output of interrupt manager module.Fix missing propagation of internal "int_mask" and "int_ena_reg" to the output of interrupt manager module.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/124Software reset via MODE[RST] should reset the whole core2018-04-24T18:47:50ZMartin JeřábekSoftware reset via MODE[RST] should reset the whole coreWriting '1' to MODE[RST] asserts `canfd_registers`.`res_out` -> `CAN_top_level`.`res_n_int`.
This signal should be used as reset for all components, however some components use `CAN_top_level`.`res_n`:
- `txtBuffer`
- `txArbitrator`
- `m...Writing '1' to MODE[RST] asserts `canfd_registers`.`res_out` -> `CAN_top_level`.`res_n_int`.
This signal should be used as reset for all components, however some components use `CAN_top_level`.`res_n`:
- `txtBuffer`
- `txArbitrator`
- `messageFilter`
- `prescaler_v3`
- `CAN_logger`
I am not sure about `CAN_logger` and `prescaler_v3`, but the others should definitely be subject to SW reset. Excluded components should be documented at the register field.
Furthermore, shouldn't `res_n_sync` be used instead of `res_n`?Bug fixingIlle, Ondrej, Ing.Ille, Ondrej, Ing.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/127Documentation clarification2018-10-04T18:57:06ZIlle, Ondrej, Ing.Documentation clarificationThe aim of this issue is to make sure all parts of documentation describe the behaviour of Core exactly.
Up to now there are following issues known within this topic:
13. Update DRV Bus and Status bus description!The aim of this issue is to make sure all parts of documentation describe the behaviour of Core exactly.
Up to now there are following issues known within this topic:
13. Update DRV Bus and Status bus description!https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/169Message filter feature test2018-09-21T17:28:07ZIlle, Ondrej, Ing.Message filter feature testAdd feature test which will verify usage of each message filter (A,B,C and Range). Simple
implementation with 4 * 2 frames (one passing, one failing frame for each filter) in single
iteration.
Thisway, code coverage for Memory registers...Add feature test which will verify usage of each message filter (A,B,C and Range). Simple
implementation with 4 * 2 frames (one passing, one failing frame for each filter) in single
iteration.
Thisway, code coverage for Memory registers will improve + new mechanism of ANDed RX Buffer
commands will be verified.Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/59Synthesis warning research2018-09-15T12:25:48ZIlle, Ondrej, Ing.Synthesis warning researchSearch through all the synthesis warnings and resolve them if possible.Search through all the synthesis warnings and resolve them if possible.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/170Unify "others" clause!2018-09-15T12:25:48ZIlle, Ondrej, Ing.Unify "others" clause!Search through Protocol control and operation control and make sure that in all cases
"others" on enumerated types is handled in the same way!Search through Protocol control and operation control and make sure that in all cases
"others" on enumerated types is handled in the same way!Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/128Bus off time2018-09-15T12:25:48ZIlle, Ondrej, Ing.Bus off timeAccording to CAN FD specification, each controller should wait at least 128 occurrences of 11 consecutive bits before transfer from BUS OFF to ERROR ACTIVE.
Actual implementation can force transition from BUS OFF to ERROR ACTIVE by eras...According to CAN FD specification, each controller should wait at least 128 occurrences of 11 consecutive bits before transfer from BUS OFF to ERROR ACTIVE.
Actual implementation can force transition from BUS OFF to ERROR ACTIVE by erasing error counters via CTR_PRES register.
This however does corrupt this rule and allows the controller to come back to life sooner than the spec allows it. This might be desirable for testing purposes, thus this approach won't be removed.
However, to be compliant with the standard, there must exist a way how to restart the controller (from BUS OFF to ERROR ACTIVE) while adhering to CAN Standard. Additional counter must be added to count occurences of 11 consecutive bits (could be separate counter or the one in "operationControl". From SW point of view two bits must be added. REQUEST bit to perform the BUS-OFF to ERROR ACTIVE, and STATUS bit to inform about the final transition upon completion of 128 * 11 condition.
Such a commands could be implemented in COMMAND register and status in FAULT_STATE register, since there are reserved bits available.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/21TODO research2018-07-10T19:41:01ZIlle, Ondrej, Ing.TODO researchSearch through the codes of the CAN Core and find all TODOs which are there.
Identify if these TODOs are relevant and actual...Search through the codes of the CAN Core and find all TODOs which are there.
Identify if these TODOs are relevant and actual...Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/168RX Buffer commands filtration2018-07-10T12:33:07ZIlle, Ondrej, Ing.RX Buffer commands filtrationAdd AND gates on ALL commands which are applied on RX Buffer. Use outcome of Message filter as
second input to AND gate. Note that first command comes at the end of control field when
ID is already received and Mesage filter output is e...Add AND gates on ALL commands which are applied on RX Buffer. Use outcome of Message filter as
second input to AND gate. Note that first command comes at the end of control field when
ID is already received and Mesage filter output is evaluated! All commands are thus applied
when Message filter contains valid values (even rec_abort). rec_ident_in is erased only in SOF
and data are invalid between SOF and ID reception. There are no Commands during this time.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/100Fix the DLC reception2018-07-10T10:49:27ZIlle, Ondrej, Ing.Fix the DLC receptionAccording to the CAN FD specification, if CAN Frame (not CAN FD Frame) is received with DLC of 8 or higher (1000,1001,1010 ...)
it should be interpreted only as 8 bytes !
The actual implementation alllows to accept CAN frame and interpt...According to the CAN FD specification, if CAN Frame (not CAN FD Frame) is received with DLC of 8 or higher (1000,1001,1010 ...)
it should be interpreted only as 8 bytes !
The actual implementation alllows to accept CAN frame and interptret the DLC in the same way as CAN FD Frames.Bug fixingIlle, Ondrej, Ing.Ille, Ondrej, Ing.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/163Add sync. chain attributes.2018-07-09T12:08:01ZIlle, Ondrej, Ing.Add sync. chain attributes.VHDL attributes should be set on input synchronisation chain in busSync module like so:
https://forums.xilinx.com/t5/Timing-Analysis/Setting-ASYNC-REG-in-VHDL-for-Two-Flop-Synchronizer/td-p/700175
This can be done by TCL constraints fi...VHDL attributes should be set on input synchronisation chain in busSync module like so:
https://forums.xilinx.com/t5/Timing-Analysis/Setting-ASYNC-REG-in-VHDL-for-Two-Flop-Synchronizer/td-p/700175
This can be done by TCL constraints file, but it is better to have it in VHDL file defined explicitly.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/164Reference test problem2018-06-29T09:28:12ZIlle, Ondrej, Ing.Reference test problemAt the moment, reference test does not have the test properly specified, which causes RX buffer unit
test to be executed instead of reference test!At the moment, reference test does not have the test properly specified, which causes RX buffer unit
test to be executed instead of reference test!Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/129TXT Buffer in bus-off2018-06-28T19:17:34ZIlle, Ondrej, Ing.TXT Buffer in bus-offError frame transmission causes transfer of TXT buffer to either READY (without reaching retransmit limit) or FAILED (when retransmit limit was reached). However if retransmit limit remains disabled (or it is not reached) during transiti...Error frame transmission causes transfer of TXT buffer to either READY (without reaching retransmit limit) or FAILED (when retransmit limit was reached). However if retransmit limit remains disabled (or it is not reached) during transition to bus-off state, the buffer goes back to READY state.
Such a behaviour is logically incorrect! Additional logic should be implemented, that shall force active TXT Buffer to go to FAILED when Error frame transmission causes controller to go to BUS OFF.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/131Rewrite AXI wrapper to be fully synchronous2018-05-18T16:47:02ZMartin JeřábekRewrite AXI wrapper to be fully synchronousThe current half-async AXI wrapper introduces path delay ~12ns, which is bad for high frequencies.
For now we can test on 50MHz, but this needs to be rewritten to cut down on the delay, albeit for the price of one extra latency cycle.
I...The current half-async AXI wrapper introduces path delay ~12ns, which is bad for high frequencies.
For now we can test on 50MHz, but this needs to be rewritten to cut down on the delay, albeit for the price of one extra latency cycle.
If generated register access interface should happen to be implemented sooner than this, we may ditch this completely and use fully duplex AXI.Martin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/133Endian fix2018-05-19T21:29:22ZIlle, Ondrej, Ing.Endian fixGenerator of C header file for Frame format and register map has
swapped LITTLE ENDIAN and BIG ENDIAN macros!
1. Correct this issue in generator.
2. Re-generate header files.Generator of C header file for Frame format and register map has
swapped LITTLE ENDIAN and BIG ENDIAN macros!
1. Correct this issue in generator.
2. Re-generate header files.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/134Buffer Data endianess2018-05-19T23:46:07ZIlle, Ondrej, Ing.Buffer Data endianessAdd component for swapping of byte endianess for data bytes.
Such a component is needed, because first byte should be stored at address 0x0 , second byte at address 0x1.
This organization is necessary for future DMA possibility which w...Add component for swapping of byte endianess for data bytes.
Such a component is needed, because first byte should be stored at address 0x0 , second byte at address 0x1.
This organization is necessary for future DMA possibility which will read data from lowest address.
Endianess swap should be configurable by generic value!Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/135Rename some register fields to "look familiar" or be more descriptive2018-09-28T13:48:13ZMartin JeřábekRename some register fields to "look familiar" or be more descriptive1. In binary fields, avoid ambiguous names. For example: FRAME_TYPE (0 means FD or 1 means FD?) -> FRAME_FDTYPE (or, if we want to be less verbose - FDF).
2. A philosophic question - should the names be long and descriptive, or short?
3....1. In binary fields, avoid ambiguous names. For example: FRAME_TYPE (0 means FD or 1 means FD?) -> FRAME_FDTYPE (or, if we want to be less verbose - FDF).
2. A philosophic question - should the names be long and descriptive, or short?
3. In documentation, always mention the meaning of the shortcut (the full register name).
- STATUS (SR)
- RBS -> RXNE (RX Not Empty)
- TBS -> TXNF (TX Not Empty)
- DO(S) (Data Overrun Status)
- ET -> EF (Error Frame / Error Transmitted?)
- ES -> EW (Error Warning)
- BS -> IDLE/BI (Bus Idle)
- SETTINGS (CR?)
- INT_LOOP - looks like it concerns interrupts but doesn't (maybe just LOOP)
- INT (ISR,IESR,IECR,IMSR,IMCR):
- ~~RI -> FRI / RFI~~
- ~~TI -> FTI / TFI~~
- RFI -> RXFI (RX Full Interrupt)
- RBNEI -> RXNEI (RX Not Empty Interrupt)
- EWL
- EWL_LIMIT -> EW_LIMIT / EWL
- RX_STATUS
- RX_EMPTY -> RXE
- RX_FULL -> RXF
- TX_COMMAND
- TXIn -> TXBn ? What does the I stand for?
- FRAME_FORM_W
- ID_TYPE -> EFF/ID_EXTENDED (Extended Frame Format)
- FR_TYPE -> FDF/FR_FDhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/136APB wrapper test2018-05-25T09:48:51ZMartin JeřábekAPB wrapper testEssentially identical to #71, but APB is much simpler than AXI.
Should probably be a unit test, testing the following:
- read from a register
- write to a register, reading back the same value
- write with byte enable
- access to the...Essentially identical to #71, but APB is much simpler than AXI.
Should probably be a unit test, testing the following:
- read from a register
- write to a register, reading back the same value
- write with byte enable
- access to the register with the highest address to verify correct address passing
- read just after (or during) HW reset correctly stalls until the core is readyTest maintenanceMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/138Severity failure finish2018-06-27T13:32:51ZIlle, Ondrej, Ing.Severity failure finishUp to now, CAN Test framework is using report with severity failure to force end of simulation.
This is not good for future automated runs. If tests would be evaluated by severities of logs,
this would cause all tests to fail. And, it i...Up to now, CAN Test framework is using report with severity failure to force end of simulation.
This is not good for future automated runs. If tests would be evaluated by severities of logs,
this would cause all tests to fail. And, it is just pure shit to print out:
report "TEST SUCCESS" severity failure.
This task should focus on updating "generate_clock" function to forbid generation once "run" input
is set to false (Or rather when test status is "passed" or "failed"). Hopefully this will not
decrease simulation performance (since there will be extra comparison each clock cycle).
Furthermore, main test loop should finish with "wait" statement to avoid running the test again.
Tricky part of this task is that some of the test have processes which never finish (e.g. are
blocked due to disabled feature in test). Simulator should quit, once there are no events to
process. Hopefully blocked processes won't block the simulator in infinite loop.
If yes (check in Bit Stuffing unit test), then tests must be examined and approach must be
modified.
I believe it is not too many processes...Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/139CI: HTTPS and token passing for Flask proxy2018-05-25T12:14:37ZMartin JeřábekCI: HTTPS and token passing for Flask proxy- set up certbot+cron on hathi
- set up nginx in docker, link the certs via volume
- put the pipeline trigger token as a secret token for the webhook
- modify the app to take the token from the header- set up certbot+cron on hathi
- set up nginx in docker, link the certs via volume
- put the pipeline trigger token as a secret token for the webhook
- modify the app to take the token from the headerContinuous integrationMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/140CI: Publish coverage results on gitlab pages2018-05-24T16:54:31ZMartin JeřábekCI: Publish coverage results on gitlab pageshttps://about.gitlab.com/2016/11/03/publish-code-coverage-report-with-gitlab-pages/
+ some more friendly way of parsing test failures: maybe xslt for junit xml and also publish it to pages?https://about.gitlab.com/2016/11/03/publish-code-coverage-report-with-gitlab-pages/
+ some more friendly way of parsing test failures: maybe xslt for junit xml and also publish it to pages?Continuous integrationMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/141ghdl unit tests: only one unit test in run for all testcases2018-05-24T16:42:34ZMartin Jeřábekghdl unit tests: only one unit test in run for all testcasesThere is one generic test wrapper, which instantiates the test component (without architecture).
Then there are wrappers of this wrapper, instantiating it and selecting the architecture to use for CAN_test.
However, the selection is not ...There is one generic test wrapper, which instantiates the test component (without architecture).
Then there are wrappers of this wrapper, instantiating it and selecting the architecture to use for CAN_test.
However, the selection is not working. This is either a GHDL bug, or I got the config wrong.Martin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/147Timestamp options feature test2018-06-29T11:50:52ZIlle, Ondrej, Ing.Timestamp options feature testImplement feature test which will configure timestamp capturing from both, end and beginning of
frames and verify that timestamp is captured properly!Implement feature test which will configure timestamp capturing from both, end and beginning of
frames and verify that timestamp is captured properly!Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/142Sanity test failing to compile2018-05-25T09:48:51ZMartin JeřábekSanity test failing to compileError introduced in 9b09dea6b629a4a083286f5.Error introduced in 9b09dea6b629a4a083286f5.Martin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/143CI/CD: generate documentation and publish to Pages2018-09-25T22:21:28ZMartin JeřábekCI/CD: generate documentation and publish to PagesA nice-to-have when the core is public and final.A nice-to-have when the core is public and final.Continuous integrationMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/84Generate VHDL registers from IP-XACT2018-12-09T16:30:04ZIlle, Ondrej, Ing.Generate VHDL registers from IP-XACTIn actual state (8.2.2018) the VHDL package file is generated by pyXact, C header file is generated by pyXact and Lx documentation.
The aim of this task is to create an extension of pyXact and additionally generate VHDL structure which ...In actual state (8.2.2018) the VHDL package file is generated by pyXact, C header file is generated by pyXact and Lx documentation.
The aim of this task is to create an extension of pyXact and additionally generate VHDL structure which will include all registers
(maybe two structures, one for read, one for write direction). The process for memory access to these structures must be generated
and instantiated as a sub-module in the can-fd registers.
Such a module would on one side need a memory bus, on the other side, two register structures (one for written and second for read data).
Generated memory access processes would also generate reset values. It would use the same generated address and bitfield constants as it is using now!
The instance of this module would then connect to Driving bus, Status bus and other signals which are driven from/to the registers.
The actual question is how to deal with the side-effects which set the signals at the moment. These are following:
1. Interrupt_vector_erase -> This wont be a problem by that time since interrupt vector erase by read will be replaced.
2. Generic support such as "sup_filtB", I dont know any way how to set this dependency in IP-XACT.
3. RX_buff_read_first -> How should we read data from the RX FIFO then?? I assume this will be a problem, since we cant afford to create a
next register for moving to the next word by user write. This would create additional delay on the data read!
Logically the next step after this task would be to replace the Driving Bus and status bus in the whole design by these two structures and use attributes of these structures instead of local aliases. This would allow to drop the index documentation and it would simplify the design, since delection of an element from the registers would immediately reflect to missing element in the structure and thus
problem in compilation of any file which would need it!ISO optimizationshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/145Fault confinement test2018-10-29T22:12:25ZIlle, Ondrej, Ing.Fault confinement testImplement test which will emulate each point from Fault confiment
chapter of CAN FD specification and check that error counters
are increased, decreased properly!Implement test which will emulate each point from Fault confiment
chapter of CAN FD specification and check that error counters
are increased, decreased properly!ISO conformance testinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/146Error and overload frame test2018-10-29T22:10:58ZIlle, Ondrej, Ing.Error and overload frame testProtocol control unit test does NOT include testing of Error frame nor Overload frame test!
Create a test which would verify proper behaviour during error frame and during Overload frame!
Create additional test which will verify that a...Protocol control unit test does NOT include testing of Error frame nor Overload frame test!
Create a test which would verify proper behaviour during error frame and during Overload frame!
Create additional test which will verify that all types of errors are detected and verified
(e.g. CRC, ACK, FORM, STUFF, BIT)...ISO conformance testinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/148GHDL 2008 support2018-06-23T04:46:18ZIlle, Ondrej, Ing.GHDL 2008 supportCheck GHDL 2008 support for possible use with feature tests and internal signals.Check GHDL 2008 support for possible use with feature tests and internal signals.Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/149CAN Test randomization2018-06-09T11:38:22ZIlle, Ondrej, Ing.CAN Test randomizationAdd randomize input to
CAN Test entity (and possibly also to CAN Test wrapper).
During test initialization random index should be selected for each rand_ctr, if this input is true.
This will allow for automated runs of tests with diffe...Add randomize input to
CAN Test entity (and possibly also to CAN Test wrapper).
During test initialization random index should be selected for each rand_ctr, if this input is true.
This will allow for automated runs of tests with different data!Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/150interrupt RXBNEI is set, but the RX FIFO is empty2018-06-20T08:59:08ZMartin Jeřábekinterrupt RXBNEI is set, but the RX FIFO is emptyWhat happens:
- one frame is transmitted on the bus and the core receives it
- RXBNEI is set
- ISR clears the interrupt and reads the frame
- RXBNEI is set again, but the frame count in CTU_CAN_FD_RX_STATUS is 0 (should not happen)
- aft...What happens:
- one frame is transmitted on the bus and the core receives it
- RXBNEI is set
- ISR clears the interrupt and reads the frame
- RXBNEI is set again, but the frame count in CTU_CAN_FD_RX_STATUS is 0 (should not happen)
- after clearing it, it is not set again until next frame reception
It is reproducible on the dev board. The RX interrupt handler prints debug messages to kernel log.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/151Fix ALC2018-06-06T11:31:00ZIlle, Ondrej, Ing.Fix ALCRe-enable Arbitration lost capture functionality.
Modify IP-XACT documentation.Re-enable Arbitration lost capture functionality.
Modify IP-XACT documentation.Bug fixinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/152ipyxact_parser is checked in as a submodule, but not declared in .gitmodules2018-06-06T12:54:12ZMartin Jeřábekipyxact_parser is checked in as a submodule, but not declared in .gitmodulesAdd as a submodule. Now recursive clone fails.
```
fatal: No url found for submodule path 'modules/CTU_CAN_FD/scripts/pyXact_generator/ipyxact_parser' in .gitmodules
```Add as a submodule. Now recursive clone fails.
```
fatal: No url found for submodule path 'modules/CTU_CAN_FD/scripts/pyXact_generator/ipyxact_parser' in .gitmodules
```Bug fixingIlle, Ondrej, Ing.Ille, Ondrej, Ing.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/153Requirements definition2019-08-04T11:34:49ZIlle, Ondrej, Ing.Requirements definitionThis task should be a discussion about topic of possible CAN Bus test rack.
Questions which come to mind are:
> 1. Location (Charles square) ??
> 2. HW architecture (how many units, which controllers, bus topology, how to emulat...This task should be a discussion about topic of possible CAN Bus test rack.
Questions which come to mind are:
> 1. Location (Charles square) ??
> 2. HW architecture (how many units, which controllers, bus topology, how to emulate possible noise, physical layer)
> 3. Financing (how much is it going to cost, who is going to pay it)
> 4. Test architecture (how to communicate, use only socket CAN or also bare-bone controllers)
> 5. Test configuration (which settings, ISO / NON-ISO, bit-rates, SJW, etc...)
> 6. Automated evaluation and connection to Gitlab CI.
> 7. What would be needed for standardization. It would be best If we could reproduce some of the tests required for standardization...ISO conformance testinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/155Use upstream-based ghdl docker image in CI2018-06-18T12:03:34ZMartin JeřábekUse upstream-based ghdl docker image in CITry it and switch to it. GHDL is getting its share of bugfixes and it is wasteful to compile own images now that GCC builds are distributed officially.Try it and switch to it. GHDL is getting its share of bugfixes and it is wasteful to compile own images now that GCC builds are distributed officially.Continuous integrationMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/157driver: handle SocketCAN mode switches2018-06-20T15:15:03ZMartin Jeřábekdriver: handle SocketCAN mode switches* [x] CAN_CTRLMODE_LISTENONLY
* [x] CAN_CTRLMODE_3_SAMPLES
* [x] CAN_CTRLMODE_FD (enable/disable FD)
* [x] CAN_CTRLMODE_PRESUME_ACK
* [x] CAN_CTRLMODE_FD_NON_ISO
* [x] CAN_CTRLMODE_ONE_SHOT* [x] CAN_CTRLMODE_LISTENONLY
* [x] CAN_CTRLMODE_3_SAMPLES
* [x] CAN_CTRLMODE_FD (enable/disable FD)
* [x] CAN_CTRLMODE_PRESUME_ACK
* [x] CAN_CTRLMODE_FD_NON_ISO
* [x] CAN_CTRLMODE_ONE_SHOTLinux driverMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/159driver: message filter support2018-07-19T13:40:21ZMartin Jeřábekdriver: message filter supportMust research this.
* detect which HW msg filters are configured in the IP
* ...Must research this.
* detect which HW msg filters are configured in the IP
* ...Linux driverMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/160driver: event logger support2019-03-14T19:55:27ZMartin Jeřábekdriver: event logger supportMust research this. How to pass events to userspace? As error frames? Or a file descriptor?Must research this. How to pass events to userspace? As error frames? Or a file descriptor?Linux driverhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/161driver: cleanup, select names2019-10-16T19:54:24ZMartin Jeřábekdriver: cleanup, select namesThe final issue to be handled in the driver milestone.
Choose:
* function prefix
* name of device in device treeThe final issue to be handled in the driver milestone.
Choose:
* function prefix
* name of device in device treeLinux driverhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/162ci: test linux driver build2018-09-03T11:04:09ZMartin Jeřábekci: test linux driver buildBuild linux driver:
* find out minimal dependencies for building out-of-tree modules
* linux headers
* build system
* config
* ...?
* stuff it into git repo / docker image / ...
Next level: actually testing the driver (requires ...Build linux driver:
* find out minimal dependencies for building out-of-tree modules
* linux headers
* build system
* config
* ...?
* stuff it into git repo / docker image / ...
Next level: actually testing the driver (requires tests on real hardware or cosimulation)Continuous integrationMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/165ci: automatically generate FPGA bitstream2018-06-29T10:24:25ZMartin Jeřábekci: automatically generate FPGA bitstreamOn master update, run a delayed nightly build of FPGA top-level design and make the bitstream available to speed up HW testing.
This issue really targets the toplevel repo https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top, but...On master update, run a delayed nightly build of FPGA top-level design and make the bitstream available to speed up HW testing.
This issue really targets the toplevel repo https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top, but is included here as a means of (devel) "documentation".
Description is in AUTOBUILD.md. Bitstream may be downloaded from pipeline artifacts on branch autobuild_*.Continuous integrationMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/166Suspend transmission feature test2018-09-03T17:59:28ZIlle, Ondrej, Ing.Suspend transmission feature testTest maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/167Data length code test2018-07-14T21:43:23ZIlle, Ondrej, Ing.Data length code testAdd feature test, which will generate CAN 2.0 Frames with DLC < 8 and verify that all 8 bytes
of Data are sent! Then generate CAN Frame with DLC > 8, send it, and verify that only 8 bytes
were sent and received!Add feature test, which will generate CAN 2.0 Frames with DLC < 8 and verify that all 8 bytes
of Data are sent! Then generate CAN Frame with DLC > 8, send it, and verify that only 8 bytes
were sent and received!Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/171ALC extension of Arbitration feature test.2019-11-08T03:36:00ZIlle, Ondrej, Ing.ALC extension of Arbitration feature test.Read out ALC value, pre-calculate expected value in Arbitration feature test, and compareRead out ALC value, pre-calculate expected value in Arbitration feature test, and compareTest improvementshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/173Bus Start Test2018-09-02T11:23:42ZIlle, Ondrej, Ing.Bus Start TestDuring documentation updated and Protocol Control review, it was discovered that after 11 recessive bits PC_Control switches
to "inteframe" state, intermission part. This might cause the fact that directly after this switch, SOF will be ...During documentation updated and Protocol Control review, it was discovered that after 11 recessive bits PC_Control switches
to "inteframe" state, intermission part. This might cause the fact that directly after this switch, SOF will be interpreted as Overload condition.
IMO interframe state should go directly to "intermission idle" state.
It might be good to examine this possible issue and add test in which one node will join active communication. This can be done in feature tests where only one frame will be sending frames with STM mode and other node will be Enabled when frame is
in progress!Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/172Code coverage improvements2018-07-21T17:02:07ZIlle, Ondrej, Ing.Code coverage improvementsActual implementation of test logic is using standard "if" clause which is no very good since,
in case of error multiple lines are not executed and code coverage gets into red numbers.
The aim of this task is to use "assert" statement w...Actual implementation of test logic is using standard "if" clause which is no very good since,
in case of error multiple lines are not executed and code coverage gets into red numbers.
The aim of this task is to use "assert" statement where possible for implementation of tests.
This would cause (in case of feature tests) loss of generality since "o.outcome" can not be
asserted by assert statement! Possible solution for this problem might be rewriting the
tests to assume that test will fail by default and that when condition is satisfied, outcome
is set to desired value!Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/174Form error detection in delim_ack2018-09-19T14:54:36ZIlle, Ondrej, Ing.Form error detection in delim_ackIt turned out that delim_ack state of Protocol Control is missing detection of Form Error on CRC Delimiter and ACK Delimiter! This
has to be performed in CRC Delimiter and acknowledge delimiter.It turned out that delim_ack state of Protocol Control is missing detection of Form Error on CRC Delimiter and ACK Delimiter! This
has to be performed in CRC Delimiter and acknowledge delimiter.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/17513 vs 14 consecutive2018-09-07T20:14:45ZIlle, Ondrej, Ing.13 vs 14 consecutiveVerify 13 vs 14 consecutive DOMINANT bits in Active Error flag. CAN FD standard says 14, but according to Protocol
Control only 13 bits are measured!Verify 13 vs 14 consecutive DOMINANT bits in Active Error flag. CAN FD standard says 14, but according to Protocol
Control only 13 bits are measured!https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/176TXBHCI is triggered on wrong state transitions2018-09-18T17:40:11ZMartin JeřábekTXBHCI is triggered on wrong state transitionsScenario:
a) wrongly configured bitrate for can5 (can4 active)
* for 50x lower bitrate (500k vs 10k) it does happen
* for 2x higher bitrate (500k vs 1m) it does *not* happen
b) can5 is alone on the bus
-> send one frame
Observe...Scenario:
a) wrongly configured bitrate for can5 (can4 active)
* for 50x lower bitrate (500k vs 10k) it does happen
* for 2x higher bitrate (500k vs 1m) it does *not* happen
b) can5 is alone on the bus
-> send one frame
Observed:
```
[ 1472.532024] ctucanfd 43c70000.CTU_CAN_FD can5: ctucan_start_xmit: using TXB#0
[ 1472.544982] ctucanfd 43c70000.CTU_CAN_FD can5: TXBHCI
[ 1472.556189] ctucanfd 43c70000.CTU_CAN_FD can5: TXI: TXB#0: status 0x2
[ 1472.562603] ctucanfd 43c70000.CTU_CAN_FD can5: BUG: TXB not in a finished state!
[...]
[ 1472.637677] ctucanfd 43c70000.CTU_CAN_FD can5: TXBHCI
[ 1472.648884] ctucanfd 43c70000.CTU_CAN_FD can5: TXI: TXB#0: status 0x1
[ 1472.655298] ctucanfd 43c70000.CTU_CAN_FD can5: BUG: TXB not in a finished state!
[...]
[ 1472.668772] ctucanfd 43c70000.CTU_CAN_FD can5: ctucan_err_interrupt: ISR = 0x00000804
[ 1472.676588] ctucanfd 43c70000.CTU_CAN_FD can5: error_warning
[...]
[ 1472.719369] ctucanfd 43c70000.CTU_CAN_FD can5: ctucan_err_interrupt: ISR = 0x00000810
[ 1472.727184] ctucanfd 43c70000.CTU_CAN_FD can5: epi: state = 2
[ 1472.733082] ctucanfd 43c70000.CTU_CAN_FD can5: error_passive
```
In other words, TXBHCI is triggered when it shouldn't. It is independent of era/erw/erp state. Untested in bus-off state.
TODO:
- how is TXBHCI generated?
- what happens with TXB status when an error is detected?
- watch it by zlogan, look into RTLMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/177driver: bittiming min/max constraints for PROP/PH1 may be violated2018-08-13T16:16:37ZMartin Jeřábekdriver: bittiming min/max constraints for PROP/PH1 may be violated`struct can_bittiming_const` contains min/max only for `tseg1`, `tseg2`, `sjw`, `brp`.
In definition, it that `tseg1 = prop_seg + phase_seg1` and in the bitrate calculation,
there is
```c
bt->prop_seg = tseg1 / 2;
bt->phase_seg1 = tseg1 ...`struct can_bittiming_const` contains min/max only for `tseg1`, `tseg2`, `sjw`, `brp`.
In definition, it that `tseg1 = prop_seg + phase_seg1` and in the bitrate calculation,
there is
```c
bt->prop_seg = tseg1 / 2;
bt->phase_seg1 = tseg1 - bt->prop_seg;
```
PROP is 7 bits (max 127), PH1 is 6 bits (max 63), so further sanitization is required!Linux driverMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/178Test SETTINGS[ILBP] - Loopback mode2019-09-26T21:31:10ZMartin JeřábekTest SETTINGS[ILBP] - Loopback modeSteps to reproduce:
```
# ip link set can4 type can bitrate 500000 loopback on
# ip link set can4 up
# candump can4 &
# cansend can4 123#45
# dmesg | tail
[ 533.246419] ctucanfd 43c30000.CTU_CAN_FD can4: TXI: TXB#0: status 0x2
[ 533.25...Steps to reproduce:
```
# ip link set can4 type can bitrate 500000 loopback on
# ip link set can4 up
# candump can4 &
# cansend can4 123#45
# dmesg | tail
[ 533.246419] ctucanfd 43c30000.CTU_CAN_FD can4: TXI: TXB#0: status 0x2
[ 533.252851] ctucanfd 43c30000.CTU_CAN_FD can4: BUG: TXB not in a finished state!
[ 533.260224] ctucanfd 43c30000.CTU_CAN_FD can4: ctucan_interrupt
[ 533.266123] ctucanfd 43c30000.CTU_CAN_FD can4: TXBHCI
[ 533.271155] ctucanfd 43c30000.CTU_CAN_FD can4: ctucan_tx_interrupt
[ 533.277329] ctucanfd 43c30000.CTU_CAN_FD can4: TXI: TXB#0: status 0x2
```
No other controller is on.
The symptoms are the same as in #176, meaning just that the core is retransmitting the frame until bus-off.
Probable cause: in addition to loopback mode, presume_ack sould be set too.Test improvementshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/179Feature test clock tolerance2018-08-30T21:14:53ZIlle, Ondrej, Ing.Feature test clock toleranceAt the moment, both nodes of CTU CAN FD in Feature test environment are feeded with the
same clock tolerance:
`clk_gen_proc: clock_gen_proc(period => f100_Mhz, duty => 50, epsilon_ppm => 0, out_clk => p(i).clk_sys);`
This is not very g...At the moment, both nodes of CTU CAN FD in Feature test environment are feeded with the
same clock tolerance:
`clk_gen_proc: clock_gen_proc(period => f100_Mhz, duty => 50, epsilon_ppm => 0, out_clk => p(i).clk_sys);`
This is not very good, since both nodes will be totally synchronous, and thus errors due
to possible malfunction of resynchronisation might not be caught. At this point of design
two CTU CAN FD should fully work with asynchronous clocks (as in Sanity test).
This should be fixed and e.g. second node should have clock tolerance of 100 ppm. Even more beneficical
would be to calculate maximal clock tolerance from CTU CAN FD standard for Bit Timing settings of
Feature test.Test maintenancehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/180Fixup broken VHDL 2008 synthesis2018-08-31T10:49:57ZIlle, Ondrej, Ing.Fixup broken VHDL 2008 synthesishttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/181RX Buffer RAM pipeline2018-09-27T23:15:05ZIlle, Ondrej, Ing.RX Buffer RAM pipelineReplace RX Buffer RAM output with clocked access to inferr BRAMs on Xilinx devices.Replace RX Buffer RAM output with clocked access to inferr BRAMs on Xilinx devices.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/182Test linux driver on real HW2019-03-14T19:52:59ZMartin JeřábekTest linux driver on real HWThis is a direct continuation of #162. The question is - as this requires the bitstream, should this be run from CAN_FD_IP_Core pipeline or from zynq-can-sja1000-top?This is a direct continuation of #162. The question is - as this requires the bitstream, should this be run from CAN_FD_IP_Core pipeline or from zynq-can-sja1000-top?ISO conformance testingMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/200Bring-up GHDL functional coverage.2019-02-02T11:15:18ZIlle, Ondrej, Ing.Bring-up GHDL functional coverage.The aim of this task is to bring up functional coverage with GHDL.
Main topics are:
1. [x] Write simple PSL cover statement into some of RTL codes.
2. [x] Execute test which activates this point.
3. [x] Show that PSL point was activated ...The aim of this task is to bring up functional coverage with GHDL.
Main topics are:
1. [x] Write simple PSL cover statement into some of RTL codes.
2. [x] Execute test which activates this point.
3. [x] Show that PSL point was activated in a coverage output.
4. [x] Add PSL coverage gatherhing settings to config file
5. [x] Create PSL statement directly to directory with functional coverage without copyingFunctional coveragehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/248tests: output does not respect verbosity settings2019-02-02T14:08:41ZMartin Jeřábektests: output does not respect verbosity settingsAfter switching to VUnit log lib, messages with all error levels are printed. In turn, the files with results are too huge and cannot be deployed to gitlab pages.
In the old vunit-enhancements branch it was solved by calling:
* show_all...After switching to VUnit log lib, messages with all error levels are printed. In turn, the files with results are too huge and cannot be deployed to gitlab pages.
In the old vunit-enhancements branch it was solved by calling:
* show_all(logger, display_handler);
* hide(logger, display_handler, debug); ...
I will look into it.Martin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/239Regmap gen saturation fix.2019-01-08T20:13:20ZIlle, Ondrej, Ing.Regmap gen saturation fix.Add fix for register map generator which will return all zeroes on read_data when adress in data_mux is saturated.Add fix for register map generator which will return all zeroes on read_data when adress in data_mux is saturated.ISO optimizationsIlle, Ondrej, Ing.Ille, Ondrej, Ing.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/219Create wave file for registers2019-01-06T16:02:56ZIlle, Ondrej, Ing.Create wave file for registersAdd new wave file with all register values as they are implemented after automatic generation of register map.Add new wave file with all register values as they are implemented after automatic generation of register map.Test improvementshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/204SSP offset2019-01-06T10:30:16ZIlle, Ondrej, Ing.SSP offsetImplement additional SW offset to Measured secondary sampling point.
Measured SSP OFFSET (trv_delay), can be still read from TRV_DELAY.
Higher bits of trv_delay register can be used for offset and offset control.
Following options for S...Implement additional SW offset to Measured secondary sampling point.
Measured SSP OFFSET (trv_delay), can be still read from TRV_DELAY.
Higher bits of trv_delay register can be used for offset and offset control.
Following options for SSP offset:
1. Use only measured value
2. Use only SW offset.
3. Use measured value + SW offset.
Addition of trv_delay and SW SSP offset will be realized inside Bus Sampling
module, since shift registers for secondary sampling are implemented there.ISO optimizationshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/188swap set/reset priority for DOI2019-01-02T16:21:31ZMartin Jeřábekswap set/reset priority for DOIContinuation of #187.
APB is access OK, but the problem would still occur on AXI/Avalon (or whichever bus which has one-cycle transactions). As a solution it would be enough to swap set/reset priority for DOI. The SW/HW race condition w...Continuation of #187.
APB is access OK, but the problem would still occur on AXI/Avalon (or whichever bus which has one-cycle transactions). As a solution it would be enough to swap set/reset priority for DOI. The SW/HW race condition which it would introduce is still here, so nothing is lost.
Tasks:
- [x] change implementation
- [x] modify tests
- [x] modify documentationISO optimizationshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/183driver: stuck in interrupt on RX buffer overrun2019-01-02T17:33:21ZMartin Jeřábekdriver: stuck in interrupt on RX buffer overrunMartin JeřábekMartin Jeřábekhttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/187Examine consecutive write data overrun and clear interrupt2018-09-11T14:51:27ZIlle, Ondrej, Ing.Examine consecutive write data overrun and clear interruptUpon overrun on RX Buffer, clear overrun flag is set. It is possible that if two consecutive memory
accesses to CMD[CDO] and INT_STAT (write to clear interrupt by overrun), this interrupt won't be cleared, since
overrun is cleared two cl...Upon overrun on RX Buffer, clear overrun flag is set. It is possible that if two consecutive memory
accesses to CMD[CDO] and INT_STAT (write to clear interrupt by overrun), this interrupt won't be cleared, since
overrun is cleared two clock cycles later.
Create testbench which will resolve this possibility!https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/156tx_arb_unit_test fails on 205th iteration2018-09-05T17:56:10ZMartin Jeřábektx_arb_unit_test fails on 205th iterationWhen TX arbitration unit test is run with high number of iterations, it eventually fails on "DUT and Model Frame valid not matching!".When TX arbitration unit test is run with high number of iterations, it eventually fails on "DUT and Model Frame valid not matching!".Test maintenanceIlle, Ondrej, Ing.Ille, Ondrej, Ing.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/184Fixup Time transmission feauture test2018-09-07T19:17:37ZIlle, Ondrej, Ing.Fixup Time transmission feauture testTime transmission feature test is failining in nightly run. Examine this and propose solution.
Possible problem is too little margin for transmission start, which is one bit time in clock cycles,
but could be theoretically bigger.Time transmission feature test is failining in nightly run. Examine this and propose solution.
Possible problem is too little margin for transmission start, which is one bit time in clock cycles,
but could be theoretically bigger.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/185driver: error interrupt: FCSI vs ctu_can_fd_read_error_state race condition2019-10-30T19:52:00ZMartin Jeřábekdriver: error interrupt: FCSI vs ctu_can_fd_read_error_state race conditionWhen receiving FCSI interrupt (error passive or bus off), it means that the controller is *or was* in that state. So when checking state afterwards, it should be like this:
1. state is ERROR_PASSIVE -> obviously we are EP
2. state is BUS...When receiving FCSI interrupt (error passive or bus off), it means that the controller is *or was* in that state. So when checking state afterwards, it should be like this:
1. state is ERROR_PASSIVE -> obviously we are EP
2. state is BUS_OFF -> we are bus off and the controller stays there until reset
3. state is *ERROR_WARNING or ERROR_ACTIVE* -> the controller was in EP, but now it is not; we should emit EP error info nonetheless, because the condition occured.
TODO: In case 3 (EPI + EW), should we announce the current EW state or not?
TODO2: Is EWI triggered only when the error counter is increased into EW zone, or also it it is decreased from EP to EW?https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/186non-zero error counters with more transmitters2019-01-02T14:59:11ZMartin Jeřábeknon-zero error counters with more transmittersTestcase:
2x ctucanfd, run intensive "cangen" on both interfaces (`cangen -g 0 -f -b -p 100 canX`)
The interfaces go high on RX errors (sometimes up to EP level, but won't cross 128). TX counter is also nonzero, but goes back towards ze...Testcase:
2x ctucanfd, run intensive "cangen" on both interfaces (`cangen -g 0 -f -b -p 100 canX`)
The interfaces go high on RX errors (sometimes up to EP level, but won't cross 128). TX counter is also nonzero, but goes back towards zero faster.
Tasks:
- [ ] is it only in FD mode or also with non-fd frames?
- [ ] is it only in high-load scenarios or also low-load?
- [ ] why isn't Bus Error interrupt (or similar) triggered?
- [ ] maybe try to employ Event Logger (from userspace) to get the exact error typehttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/189driver: Time-based packet transmission2019-03-14T19:50:53ZMartin Jeřábekdriver: Time-based packet transmissionThe necessary kernel features are not yet merged but they are on the way. Keep this in mind and implement it when it is ready (v4.19). Also see if it is suitable for CAN at all.
https://lwn.net/Articles/748879/The necessary kernel features are not yet merged but they are on the way. Keep this in mind and implement it when it is ready (v4.19). Also see if it is suitable for CAN at all.
https://lwn.net/Articles/748879/Wishlisthttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/190Update licence header2018-09-28T15:22:43ZIlle, Ondrej, Ing.Update licence headerActual header is improper for Released version of the Core. It should contain both Martin Jerabek and Ondrej Ille as Core authors and Mr. Pisa and Mr. Novak as advisors. This should be easy to modify since there is a script exesting for ...Actual header is improper for Released version of the Core. It should contain both Martin Jerabek and Ondrej Ille as Core authors and Mr. Pisa and Mr. Novak as advisors. This should be easy to modify since there is a script exesting for this :)https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/191driver: support multiqueue TX2019-03-14T19:47:39ZMartin Jeřábekdriver: support multiqueue TXIdea for TX: If we implement TX DMA as multiple FIFOs, the SocketCAN driver could benefit from this. CAN in Linux (will shortly) support multiqueue TX (and RX). The patch mentions that it could be supported even now (without DMA) if the ...Idea for TX: If we implement TX DMA as multiple FIFOs, the SocketCAN driver could benefit from this. CAN in Linux (will shortly) support multiqueue TX (and RX). The patch mentions that it could be supported even now (without DMA) if the HW supports soft abort (which our core does).
This is, again, a pure Wishlist issue, mainly here to keep track of it.
Patches: https://lore.kernel.org/patchwork/cover/913525/ (see Related for more code).
The relevant patch is merged in v4.19-rc1.Wishlisthttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/192apb: add testcase for read pulse width2019-08-04T11:33:11ZMartin Jeřábekapb: add testcase for read pulse widthEffectively test commit d042eb84db41b51. Before it should fail, after it should pass.Effectively test commit d042eb84db41b51. Before it should fail, after it should pass.Test improvementshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/193Release 2.1 cleanup2018-10-05T17:07:34ZIlle, Ondrej, Ing.Release 2.1 cleanupClean all the remaining troubles and do the Release...Clean all the remaining troubles and do the Release...https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/194Protocol Control rework2019-08-02T16:42:29ZIlle, Ondrej, Ing.Protocol Control reworkRe-write Protocol control into separate FSMs to achieve higher modularity, cleaner design and possible lower ALM usage.Re-write Protocol control into separate FSMs to achieve higher modularity, cleaner design and possible lower ALM usage.ISO optimizationsIlle, Ondrej, Ing.Ille, Ondrej, Ing.https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/195TX Buffer explicit memory2018-10-31T20:22:24ZIlle, Ondrej, Ing.TX Buffer explicit memoryAs RX Buffer FIFO contains explicit inferred RAM wrapper, it might be good to do it the same way in TXT Buffers,
to use one entity wrappers for all RAMs / BRAMs. This wrapper might in future be replaced by hard-core RAM IP.As RX Buffer FIFO contains explicit inferred RAM wrapper, it might be good to do it the same way in TXT Buffers,
to use one entity wrappers for all RAMs / BRAMs. This wrapper might in future be replaced by hard-core RAM IP.ISO optimizationshttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/196ISO test framework spec2020-12-06T18:13:52ZIlle, Ondrej, Ing.ISO test framework specCreate specification of:
1. CAN test framework library.
2. CAN bit timing model.
3. Commands applied from test-case on CAN Bit-timing library.Create specification of:
1. CAN test framework library.
2. CAN bit timing model.
3. Commands applied from test-case on CAN Bit-timing library.ISO conformance testinghttps://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core/-/issues/197ISO test library implementation2020-12-06T18:14:02ZIlle, Ondrej, Ing.ISO test library implementationImplement library as defined in ISO test framework spec.Implement library as defined in ISO test framework spec.ISO conformance testing