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Reapplied, as it got lost for some reason ...

Swapped priority of set/reset for DOI interrupt. Added

Closes #188

See merge request illeondr/CAN_FD_IP_Core!177

constant with definition of Interrupt Set/Clear priorities.

Resolve "add registers for reading current timestamp"

Closes #208

See merge request illeondr/CAN_FD_IP_Core!176

to do all the work. Voila, miracle of register map generator.

Resolve "Design decoupling"

Closes #207

See merge request illeondr/CAN_FD_IP_Core!175

not support context. Used context only for testbench codes.

for negative values.

latest work.

Joined all test includes to single context.

Re-named CANComponents to can_components.

wrapper. Output is already selected CRC based on selector signal.

Used single adder for both counters and mux on input.
Added assert on mutual exclusion of simultaneous addition.
This should be always valid since "tran_valid" and "rec_valid"
occur in different part of CAN frame.