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On high data bit-rates this is needed!

If error is forced on 5th bit of error delimiter, this will be already
after error frame of the other node, so next error frame will hit Error
delimiter of the other node. Due to this, the other node will transmit
next error frame and thus after bus is idle, REC will be incremented
twice. This is not a bug, but check of REC must be done directly after
error is sampled!

Keep bit 31 of generated TS equal to 0. This is to avoid
overflow on numeric conversion of 31 bit unsigned vector
to natural.

Here after ACK we can be in EOF if sent frame is FD frame!

This is needed since we hardcode the ID in first bits. Extended
ID is needed so that we don't overflow base ID limit!

This is needed since default delay can be too high for some
bit-rates! Units will not manage to received ACK in time!

Each error now kills the test by "error" log!

Avoid using delays multiple of 10 ns. Since we use ceil in
the TC, we rely on the fact that ceil will give us one cycle
more from input delay! If we have multiple of 10 ns, then
delta cycle behavior might cause issues.

RWCNT needs to be modified accordingly, so that TX/RX frame
comparison is not confused!

Check must be done immediately, otherwise another error frame
might screw REC value and it can be off by 8!

We must wait till bus is idle in both nodes since nodes since
TX/RX trigger are validated at different times! If we wait
only until frame is sent/ we end up out of sync and one step
back on frame that is being sent!

RTR must not be present! Also RWCNT must be recalculated accordingly!

Node 2 RX Trigger might come later due to different clocks!
We should wait properly till its sample point to be sure that
we don't check arbitration lost too soon!