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marked as "modify only when the core is off". This will hopefully
prevent users changing bit-rate during transmission :D

re-generated register map.

Added saturation on SSP delay.
Separated TX,RX edge detection to stand-alone modules.

constant with definition of Interrupt Set/Clear priorities.

to do all the work. Voila, miracle of register map generator.

in IP-XACT.

2. Swapped polarity of INT_MASK
3. Updated unit test accordingly.
4. Clarified documentation (diagram still TODO).

docs and header files.

implementation.

the bit phases and baud-rate prescaler.

included.

2. Added TXT Buffer HW command interrupt
3. Removed wake_up valid, since it was unused.

and clear as part of SocketCAN support.

This register structure is necessary to perform lock-less
access to interrupt registers from multiple threads.

Changed event details encoding in IP-XACT.

options on RX Buffer.

was frame swap, which is not needed with prioritized implementation
of buffers.

have each word exactly defined