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Checks no SOF (arbitration directly after idle) is transmitted,
and also uses ID with first 5 bits dominant so that it checks
that stuff bit is inserted at proper position.

Each mode like LOM, STM, FDE, ACF will be covered in a
separate TC.

The test was not accustomized to providing data halt immediately
instead of with one clock cycle delay! Whole test changed to issuing
triggers on rising edge (like real device), due to combinatorial
glitches when falling edge was used (since output is now combinatorial).
Also, Stuff error detection accustomized.