- 11 Sep, 2018 7 commits
-
-
Ille, Ondrej, Ing. authored
upon sucessfull transmission from Abort in progress... Signed-off-by:
Ille, Ondrej, Ing <illeondr@fel.cvut.cz>
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
Resolve "Examine consecutive write data overrun and clear interrupt" Closes #187 See merge request illeondr/CAN_FD_IP_Core!154
-
Ille, Ondrej, Ing. authored
-
- 09 Sep, 2018 1 commit
-
-
Ille, Ondrej, Ing. authored
-
- 07 Sep, 2018 4 commits
-
-
Ille, Ondrej, Ing. authored
Resolve "13 vs 14 consecutive" Closes #175 See merge request illeondr/CAN_FD_IP_Core!153
-
Ille, Ondrej, Ing. authored
Frame to 14 (instead of 13)!
-
Ille, Ondrej, Ing. authored
Resolve "Fixup Time transmission feauture test" Closes #184 See merge request illeondr/CAN_FD_IP_Core!152
-
Ille, Ondrej, Ing. authored
case stuff. Added wait period in the beginning to make sure unit is not integrating anymore!
-
- 06 Sep, 2018 10 commits
-
-
Martin Jeřábek authored
Driver build: export in artifacts See merge request illeondr/CAN_FD_IP_Core!146
-
Martin Jeřábek authored
-
Martin Jeřábek authored
-
Martin Jeřábek authored
Resolve "TXBHCI is triggered on wrong state transitions" Closes #176 See merge request illeondr/CAN_FD_IP_Core!150
-
Martin Jeřábek authored
Closes #176
-
Martin Jeřábek authored
Resolve "driver: stuck in interrupt on RX buffer overrun" Closes #183 See merge request illeondr/CAN_FD_IP_Core!149
-
Martin Jeřábek authored
-
Martin Jeřábek authored
Closes #183
-
Martin Jeřábek authored
-
Martin Jeřábek authored
-
- 05 Sep, 2018 9 commits
-
-
Ille, Ondrej, Ing. authored
Resolve "tx_arb_unit_test fails on 205th iteration" Closes #156 See merge request illeondr/CAN_FD_IP_Core!148
-
Ille, Ondrej, Ing. authored
of inconsistency in the design. If async change occured during this time, then old priorities were used instead of new ones!
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
Allowed one clock cycle mismatch. On more than one clock cycle, error is reported.
-
- 03 Sep, 2018 9 commits
-
-
Ille, Ondrej, Ing. authored
Resolve "Suspend transmission feature test" Closes #166 See merge request illeondr/CAN_FD_IP_Core!147
-
Ille, Ondrej, Ing. authored
for 3, we wont start the transmission right after the Intermission by Node 2, because the frame will be inserted after sample point, and thus Node 2 will send it after 1 bit of being Idle.
-
Ille, Ondrej, Ing. authored
CAN FD Standard sets the counter to value between 119 and 127 ich frame is successfully transmitted in error passive!!!
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
after 8 hours of reading documentation on ASIC design flow!!!
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-
Ille, Ondrej, Ing. authored
-