Re-run FPGA resource benchmarks after Register map generation.

e99b9155 · Ille, Ondrej, Ing. · 20be4958 · e99b9155
Commit e99b9155 authored Dec 08, 2018 by Ille, Ondrej, Ing.
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synthesis/Vivado/xilinx_benchmark/xilinx_benchmark.xpr synthesis/Vivado/xilinx_benchmark/xilinx_benchmark.xpr +142 -142

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