Commit df7bcadd authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

Removed soft reset feature test. Consolidated

Arbitration, Interrupt, RX Status tests.
Separated CAN_send_frame to two functions.
Signed-off-by: Ille, Ondrej, Ing.'s avatarIlle, Ondrej, Ing <illeondr@fel.cvut.cz>
parent 5313307a
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...@@ -39,19 +39,22 @@ ...@@ -39,19 +39,22 @@
-- Purpose: -- Purpose:
-- RX Buffer status feature test implementation. -- RX Buffer status feature test implementation.
-- --
-- Test sequence is like so: -- Test sequence:
-- 1. RX Buffer size is read and buffer is cleared, -- 1. RX Buffer size is read and buffer is cleared.
-- 2. Free memory, buffer status and message count is checked -- 2. Free memory, buffer status and message count is checked.
-- 3. Random frames are sent on the bus by node 2 and recieved by node 1 -- 3. Random frames are sent on the bus by node 2 and recieved by node 1
-- 4. After each frame amount of remaining memory is checked towards expected value -- 4. After each frame amount of remaining memory is checked towards expected
-- 5. When buffer is filled Data overrun flag is checked and cleared -- value.
-- 6. After clearing Overrun flag, it is checked it was really cleared -- 5. When buffer is filled Data overrun flag is checked and cleared.
-- 6. After clearing Overrun flag, it is checked it was really cleared.
-- --
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
-- Revision History: -- Revision History:
-- --
-- 21.6.2016 Created file -- 21.6.2016 Created file
-- 06.02.2018 Modified to work with the IP-XACT generated memory map -- 06.02.2018 Modified to work with the IP-XACT generated memory map
-- 11.6.2018 Modified to use CAN Test lib functions instead of direct
-- register access.
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
Library ieee; Library ieee;
...@@ -67,183 +70,157 @@ use work.CAN_FD_frame_format.all; ...@@ -67,183 +70,157 @@ use work.CAN_FD_frame_format.all;
package rx_status_feature is package rx_status_feature is
procedure rx_status_feature_exec( procedure rx_status_feature_exec(
variable outcome : inout boolean; variable outcome : inout boolean;
signal rand_ctr :inout natural range 0 to RAND_POOL_SIZE; signal rand_ctr : inout natural range 0 to RAND_POOL_SIZE;
signal mem_bus_1 :inout Avalon_mem_type; signal mem_bus_1 : inout Avalon_mem_type;
signal mem_bus_2 :inout Avalon_mem_type; signal mem_bus_2 : inout Avalon_mem_type;
--Additional signals for tests signal bus_level : in std_logic;
--Pretty much everything can be read out of stat bus... signal drv_bus_1 : in std_logic_vector(1023 downto 0);
signal bus_level :in std_logic; signal drv_bus_2 : in std_logic_vector(1023 downto 0);
signal drv_bus_1 :in std_logic_vector(1023 downto 0); signal stat_bus_1 : in std_logic_vector(511 downto 0);
signal drv_bus_2 :in std_logic_vector(1023 downto 0); signal stat_bus_2 : in std_logic_vector(511 downto 0)
signal stat_bus_1 :in std_logic_vector(511 downto 0); );
signal stat_bus_2 :in std_logic_vector(511 downto 0)
);
end package; end package;
package body rx_status_feature is package body rx_status_feature is
procedure rx_status_feature_exec( procedure rx_status_feature_exec(
variable outcome : inout boolean; variable outcome : inout boolean;
signal rand_ctr :inout natural range 0 to RAND_POOL_SIZE; signal rand_ctr : inout natural range 0 to RAND_POOL_SIZE;
signal mem_bus_1 :inout Avalon_mem_type; signal mem_bus_1 : inout Avalon_mem_type;
signal mem_bus_2 :inout Avalon_mem_type; signal mem_bus_2 : inout Avalon_mem_type;
--Additional signals for tests signal bus_level : in std_logic;
--Pretty much everything can be read out of stat bus... signal drv_bus_1 : in std_logic_vector(1023 downto 0);
signal bus_level :in std_logic; signal drv_bus_2 : in std_logic_vector(1023 downto 0);
signal drv_bus_1 :in std_logic_vector(1023 downto 0); signal stat_bus_1 : in std_logic_vector(511 downto 0);
signal drv_bus_2 :in std_logic_vector(1023 downto 0); signal stat_bus_2 : in std_logic_vector(511 downto 0)
signal stat_bus_1 :in std_logic_vector(511 downto 0); ) is
signal stat_bus_2 :in std_logic_vector(511 downto 0) variable ID_1 : natural range 0 to 15 := 1;
)is variable ID_2 : natural range 0 to 15 := 2;
variable r_data : std_logic_vector(31 downto 0):=(OTHERS => '0'); variable CAN_frame : SW_CAN_frame_type;
variable w_data : std_logic_vector(31 downto 0):=(OTHERS => '0'); variable send_more : boolean := true;
variable size_of_buf : natural; variable in_RX_buf : natural range 0 to 1023;
variable ID_1 : natural:=1; variable frame_sent : boolean := false;
variable ID_2 : natural:=2; variable number_frms_sent : natural range 0 to 1023;
variable CAN_frame : SW_CAN_frame_type;
variable send_more : boolean:=true; variable buf_info : SW_RX_Buffer_info;
variable in_RX_buf : natural range 0 to 1023; variable command : SW_command := (false, false, false);
variable frame_sent : boolean:=false; variable status : SW_status;
variable number_frms_sent : natural range 0 to 1023; begin
variable aux2 : natural range 0 to 1023; outcome := true;
variable aux : std_logic_vector(7 downto 0):=(OTHERS => '0');
begin ------------------------------------------------------------------------
outcome:= true; -- Restart the content of the buffer...
------------------------------------------------------------------------
------------------------------------------- command.release_rec_buffer := true;
-- Read the size of the synthesized buffer give_controller_command(command, ID_1, mem_bus_1);
------------------------------------------- command.release_rec_buffer := false;
CAN_read(r_data,RX_BUFF_SIZE_ADR,ID_1,mem_bus_1);
size_of_buf:= to_integer(unsigned( ------------------------------------------------------------------------
r_data(RX_BUFF_SIZE_VALUE_H downto RX_BUFF_SIZE_VALUE_L))); -- Read the size of the synthesized buffer
------------------------------------------------------------------------
------------------------------------------- get_rx_buf_state(buf_info, ID_1, mem_bus_1);
--Restart the content of the buffer...
------------------------------------------- ------------------------------------------------------------------------
CAN_read(r_data,MODE_ADR,ID_1,mem_bus_1); -- Check that buffer is empty
r_data(RRB_IND) := '1'; --Release recieve buffer bit ------------------------------------------------------------------------
CAN_write(r_data,MODE_ADR,ID_1,mem_bus_1); if (not buf_info.rx_empty) then
outcome := false;
------------------------------------------- end if;
--Check that buffer is empty
--Check that mem free is equal to buff size ------------------------------------------------------------------------
--Check that both pointers are 0 as well -- Check that free memory is equal to buffer size
-- as message count ------------------------------------------------------------------------
------------------------------------------- if (buf_info.rx_buff_size /= buf_info.rx_mem_free) then
CAN_read(r_data,RX_STATUS_ADR,ID_1,mem_bus_1); outcome := false;
if(r_data(RX_EMPTY_IND) /= '1' or r_data(RX_FULL_IND) /= '0')then end if;
outcome:= false;
end if; ------------------------------------------------------------------------
-- Check that both pointers are 0 as well
if(to_integer(unsigned(r_data(RX_MF_VALUE_H downto RX_MF_VALUE_L))) -- as message count
/= size_of_buf) ------------------------------------------------------------------------
then if (buf_info.rx_frame_count /= 0 or buf_info.rx_write_pointer /= 0 or
outcome:= false; buf_info.rx_read_pointer /= 0)
end if; then
outcome := false;
if(to_integer(unsigned(r_data(RX_MC_VALUE_H downto RX_MC_VALUE_L))) /= 0)then
outcome:= false;
end if;
CAN_read(r_data,RX_BUFF_SIZE_ADR,ID_1,mem_bus_1);
if((r_data(LOG_RPP_VAL_H downto LOG_RPP_VAL_L) /= x"00") or
(r_data(LOG_WPP_VAL_H downto LOG_WPP_VAL_L) /= x"00"))
then
outcome:= false;
end if;
--------------------------------------------
-- Generate the CAN frames to send
--------------------------------------------
while send_more=true loop
CAN_generate_frame(rand_ctr,CAN_frame);
if(CAN_frame.rtr=RTR_FRAME and CAN_frame.frame_format=NORMAL_CAN)then
if(in_RX_buf+4 > size_of_buf)then
send_more:= false;
end if; end if;
else
if(CAN_frame.data_length mod 4 = 0)then ------------------------------------------------------------------------
if(in_RX_buf+CAN_frame.data_length/4+4 > size_of_buf)then -- Generate the CAN frames and send them by Node 2
send_more:= false; ------------------------------------------------------------------------
while send_more loop
CAN_generate_frame(rand_ctr, CAN_frame);
-- Evaluate if next frame should be sent
if (CAN_frame.rtr = RTR_FRAME and
CAN_frame.frame_format = NORMAL_CAN)
then
if (in_RX_buf + 4 > buf_info.rx_buff_size) then
send_more := false;
end if;
else
if (CAN_frame.data_length mod 4 = 0) then
if ((in_RX_buf + CAN_frame.data_length / 4 + 4) >
buf_info.rx_buff_size)
then
send_more := false;
end if;
else
if ((in_RX_buf + CAN_frame.data_length / 4 + 5) >
buf_info.rx_buff_size)
then
send_more := false;
end if;
end if;
end if; end if;
else
if(in_RX_buf+CAN_frame.data_length/4+5 > size_of_buf)then CAN_send_frame(CAN_frame, 1, ID_2, mem_bus_2, frame_sent);
send_more:= false; CAN_wait_frame_sent(ID_1, mem_bus_1);
number_frms_sent := number_frms_sent + 1;
in_RX_buf := in_RX_buf + CAN_frame.rwcnt + 1;
--------------------------------------------------------------------
-- Check that message count was incremented and memfree is correct!
--------------------------------------------------------------------
get_rx_buf_state(buf_info, ID_1, mem_bus_1);
if (number_frms_sent /= buf_info.rx_frame_count and send_more) then
outcome := false;
end if; end if;
end if; if ((buf_info.rx_mem_free + in_RX_buf) /= buf_info.rx_buff_size
end if; and send_more)
--TODO:change to arbitrary BRS then
--CAN_frame.brs:='0'; outcome := false;
end if;
CAN_send_frame(CAN_frame,1,ID_2,mem_bus_2,frame_sent);
CAN_wait_frame_sent(ID_1,mem_bus_1); end loop;
number_frms_sent:=number_frms_sent+1;
if((CAN_frame.rtr=RTR_FRAME and CAN_frame.frame_format=NORMAL_CAN)
or CAN_frame.data_length=0)
then
in_RX_buf:=in_RX_buf+4;
else
if(CAN_frame.data_length mod 4 = 0)then
in_RX_buf:=in_RX_buf+(CAN_frame.data_length/4)+4;
else
in_RX_buf:=in_RX_buf+(CAN_frame.data_length/4+1)+4;
end if;
end if;
--Wait until frame is for sure stored in the RX Buffer
for i in 0 to 19 loop
wait until rising_edge(mem_bus_1.clk_sys);
end loop;
--Check that mc was incremented and memfree is according
CAN_read(r_data,RX_STATUS_ADR,ID_1,mem_bus_1);
aux:=r_data(RX_MC_VALUE_H downto RX_MC_VALUE_L);
aux2:=to_integer(unsigned(aux));
if(number_frms_sent /= aux2 and send_more=true)then
outcome:= false;
end if;
if(to_integer(unsigned(r_data(RX_MF_VALUE_H downto RX_MF_VALUE_L)))+in_RX_buf
/= size_of_buf and send_more=true)
then
outcome:= false;
end if;
end loop;
-------------------------------------------- ------------------------------------------------------------------------
-- Here we should check the Data overrun -- Check that data overrun status is set (we sent one more frame than
-- status! -- needed... Overrun should be present
-- Now data oveerrun flag should be set ------------------------------------------------------------------------
-------------------------------------------- get_controller_status(status, ID_1, mem_bus_1);
CAN_read(r_data,MODE_ADR,ID_1,mem_bus_1); if (not status.data_overrun) then
if(r_data(DOS_IND)='0')then outcome := false;
outcome:=false; end if;
end if;
------------------------------------------- ------------------------------------------------------------------------
-- Clear the data overrun flag -- Clear the data overrun flag
------------------------------------------- ------------------------------------------------------------------------
r_data(CDO_IND):='1'; command.clear_data_overrun := true;
CAN_write(r_data,MODE_ADR,ID_1,mem_bus_1); give_controller_command(command, ID_1, mem_bus_1);
command.clear_data_overrun := false;
--------------------------------------------
-- Check that overrun flag was cleared ------------------------------------------------------------------------
-------------------------------------------- -- Check that overrun flag was cleared
CAN_read(r_data,MODE_ADR,ID_1,mem_bus_1); ------------------------------------------------------------------------
if(r_data(DOS_IND)='1')then get_controller_status(status, ID_1, mem_bus_1);
outcome:=false; if (status.data_overrun) then
end if; outcome := false;
end if;
end procedure; end procedure;
end package body; end package body;
\ No newline at end of file
--------------------------------------------------------------------------------
--
-- CTU CAN FD IP Core
-- Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com>
--
-- Project advisors and co-authors:
-- Jiri Novak <jnovak@fel.cvut.cz>
-- Pavel Pisa <pisa@cmp.felk.cvut.cz>
-- Martin Jerabek <jerabma7@fel.cvut.cz>
-- Department of Measurement (http://meas.fel.cvut.cz/)
-- Faculty of Electrical Engineering (http://www.fel.cvut.cz)
-- Czech Technical University (http://www.cvut.cz/)
--
-- Permission is hereby granted, free of charge, to any person obtaining a copy
-- of this VHDL component and associated documentation files (the "Component"),
-- to deal in the Component without restriction, including without limitation
-- the rights to use, copy, modify, merge, publish, distribute, sublicense,
-- and/or sell copies of the Component, and to permit persons to whom the
-- Component is furnished to do so, subject to the following conditions:
--
-- The above copyright notice and this permission notice shall be included in
-- all copies or substantial portions of the Component.
--
-- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
-- IN THE COMPONENT.
--
-- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
-- Anybody who wants to implement this IP core on silicon has to obtain a CAN
-- protocol license from Bosch.
--
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-- Purpose:
--
--
-- Test sequence is like so:
-- 1.
-- 2.
-- 3.
-- 4.
-- 5.
-- 6.
--
--------------------------------------------------------------------------------
-- Revision History:
--
-- 28.6.2016 Created file
-- 1.9.2016 Changed test to be compliant with latest change in register memory map!
-- 06.02.2018 Modified to work with the IP-XACT generated memory map
--------------------------------------------------------------------------------
Library ieee;
USE IEEE.std_logic_1164.all;
USE IEEE.numeric_std.ALL;
USE ieee.math_real.ALL;
use work.CANconstants.all;
USE work.CANtestLib.All;
USE work.randomLib.All;
use work.CAN_FD_register_map.all;
package soft_reset_feature is
procedure soft_reset_feature_exec(
variable outcome : inout boolean;
signal rand_ctr :inout natural range 0 to RAND_POOL_SIZE;
signal mem_bus_1 :inout Avalon_mem_type;
signal mem_bus_2 :inout Avalon_mem_type;
--Additional signals for tests
--Pretty much everything can be read out of stat bus...
signal bus_level :in std_logic;
signal drv_bus_1 :in std_logic_vector(1023 downto 0);
signal drv_bus_2 :in std_logic_vector(1023 downto 0);
signal stat_bus_1 :in std_logic_vector(511 downto 0);
signal stat_bus_2 :in std_logic_vector(511 downto 0)
);
end package;
package body soft_reset_feature is
procedure soft_reset_feature_exec(
variable outcome : inout boolean;
signal rand_ctr :inout natural range 0 to RAND_POOL_SIZE;
signal mem_bus_1 :inout Avalon_mem_type;
signal mem_bus_2 :inout Avalon_mem_type;
--Additional signals for tests
--Pretty much everything can be read out of stat bus...
signal bus_level :in std_logic;
signal drv_bus_1 :in std_logic_vector(1023 downto 0);
signal drv_bus_2 :in std_logic_vector(1023 downto 0);
signal stat_bus_1 :in std_logic_vector(511 downto 0);
signal stat_bus_2 :in std_logic_vector(511 downto 0)
)is
variable r_data : std_logic_vector(31 downto 0):=(OTHERS => '0');
variable w_data : std_logic_vector(31 downto 0):=(OTHERS => '0');
variable ID_1 : natural:=1;
variable ID_2 : natural:=2;
variable CAN_frame : SW_CAN_frame_type;
variable frame_sent : boolean:=false;
begin
outcome:=true;
--------------------------------------------------
--Write into the restart bit of MODE_REG
--------------------------------------------------
CAN_read(r_data,MODE_ADR,ID_1,mem_bus_1);
r_data(RST_IND) := '1';
CAN_write(r_data,MODE_ADR,ID_1,mem_bus_1);
--------------------------------------------------
--Continously check on expected default values!
--------------------------------------------------
CAN_read(r_data,DEVICE_ID_ADR,ID_1,mem_bus_1);
if(r_data /= DEVICE_ID_RSTVAL)then
outcome:=false;
end if;
--Mode register
CAN_read(r_data,MODE_ADR,ID_1,mem_bus_1);
if(r_data /= "00000000100000000000000000110000")then
outcome:=false;
end if;
--Interrupt registers
CAN_read(r_data,INT_ADR,ID_1,mem_bus_1);
if(r_data /= "00000000001011000000000000000000")then
outcome:=false;
end if;
--Timing register
CAN_read(r_data,BTR_ADR,ID_1,mem_bus_1);
if(r_data /= "00011000110000110010100011000101")then
outcome:=false;
end if;
--ALC presc register
CAN_read(r_data,ALC_ADR,ID_1,mem_bus_1);
if(r_data(7 downto 0) /= "00000000")then
outcome:=false;
end if;
if(r_data(15 downto 8) /= "00100010")then
outcome:=false;
end if;
if(r_data(31 downto 16) /= "0000010000001010")then
outcome:=false;
end if;
--EWL register
CAN_read(r_data,EWL_ADR,ID_1,mem_bus_1);
if(r_data(7 downto 0) /= "01100000")then --96
outcome:=false;
end if;
if(r_data(15 downto 8) /= "10000000")then --128
outcome:=false;
end if;
if(r_data(31 downto 16) /= "0000000000000001")then --Only Error active
outcome:=false;
end if;
--Error registers
CAN_read(r_data,RXC_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
--Special Error registers
CAN_read(r_data,ERR_NORM_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
----------
--Filters
----------
CAN_read(r_data,FILTER_A_VAL_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
CAN_read(r_data,FILTER_B_VAL_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
CAN_read(r_data,FILTER_C_VAL_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
CAN_read(r_data,FILTER_A_MASK_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
CAN_read(r_data,FILTER_B_MASK_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
CAN_read(r_data,FILTER_C_MASK_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
CAN_read(r_data,FILTER_RAN_LOW_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
CAN_read(r_data,FILTER_RAN_HIGH_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000000000")then
outcome:=false;
end if;
CAN_read(r_data,FILTER_CONTROL_ADR,ID_1,mem_bus_1);
if(r_data(31 downto 0) /= "00000000000000000000000000001111")then
outcome:=false;
end if;
--RX Info 1
CAN_read(r_data,RX_STATUS_ADR,ID_1,mem_bus_1);
if(r_data(15 downto 0) /= "0000000000000001")then
outcome:=false;
end if;
if(r_data(23 downto 16) /= "01000000")then
outcome:=false;
end if;
--RX Info 2
CAN_read(r_data,RX_BUFF_SIZE_ADR, ID_1,mem_bus_1);
if(r_data(7 downto 0) /= "01000000")then
outcome:=false;
end if;