Commit cf4084cb authored by Pavel Pisa's avatar Pavel Pisa

driver: correct more problems reported by checkpatch.pl.

Signed-off-by: Pavel Pisa's avatarPavel Pisa <pisa@cmp.felk.cvut.cz>
parent 178425cc
......@@ -65,8 +65,7 @@ static bool pci_use_second = 1;
module_param(pci_use_second, bool, 0444);
MODULE_PARM_DESC(pci_use_second, "Use the second CAN core on PCIe card. Default: 1 (yes)");
/*
* TX buffer rotation:
/* TX buffer rotation:
* - when a buffer transitions to empty state, rotate order and priorities
* - if more buffers seem to transition at the same time, rotate
* by the number of buffers
......@@ -108,15 +107,13 @@ static int ctucan_reset(struct net_device *ndev)
for (i = 0; i < 100; ++i) {
if (ctu_can_fd_check_access(&priv->p))
return 0;
udelay(100);
usleep_range(100, 200);
}
netdev_warn(ndev, "device did not leave reset\n");
return -ETIMEDOUT;
}
/**
* ctucan_set_bittiming - CAN set bit timing routine
* @ndev: Pointer to net_device structure
......@@ -133,7 +130,7 @@ static int ctucan_set_bittiming(struct net_device *ndev)
if (ctu_can_fd_is_enabled(&priv->p)) {
netdev_alert(ndev,
"BUG! Cannot set bittiming - CAN is enabled\n");
"BUG! Cannot set bittiming - CAN is enabled\n");
return -EPERM;
}
......@@ -143,7 +140,6 @@ static int ctucan_set_bittiming(struct net_device *ndev)
return 0;
}
/**
* ctucan_set_data_bittiming - CAN set data bit timing routine
* @ndev: Pointer to net_device structure
......@@ -160,7 +156,7 @@ static int ctucan_set_data_bittiming(struct net_device *ndev)
if (ctu_can_fd_is_enabled(&priv->p)) {
netdev_alert(ndev,
"BUG! Cannot set bittiming - CAN is enabled\n");
"BUG! Cannot set bittiming - CAN is enabled\n");
return -EPERM;
}
......@@ -196,7 +192,6 @@ static int ctucan_chip_start(struct net_device *ndev)
priv->txb_tail = 0;
priv->p.write_reg(&priv->p, CTU_CAN_FD_TX_PRIORITY, priv->txb_prio);
err = ctucan_set_bittiming(ndev);
if (err < 0)
return err;
......@@ -205,7 +200,6 @@ static int ctucan_chip_start(struct net_device *ndev)
if (err < 0)
return err;
/* Enable interrupts */
int_ena.u32 = 0;
int_ena.s.rbnei = 1;
......@@ -279,7 +273,6 @@ static int ctucan_do_set_mode(struct net_device *ndev, enum can_mode mode)
return ret;
}
/**
* ctucan_start_xmit - Starts the transmission
* @skb: sk_buff pointer that contains data to be Txed
......@@ -302,7 +295,6 @@ static int ctucan_start_xmit(struct sk_buff *skb, struct net_device *ndev)
if (can_dropped_invalid_skb(ndev, skb))
return NETDEV_TX_OK;
/* Check if the TX buffer is full */
if (unlikely(!CTU_CAN_FD_TXTNF(ctu_can_get_status(&priv->p)))) {
netif_stop_queue(ndev);
......@@ -357,7 +349,7 @@ static int ctucan_rx(struct net_device *ndev)
if (ffw.s.fdf == FD_CAN)
skb = alloc_canfd_skb(ndev, &cf);
else
skb = alloc_can_skb(ndev, (struct can_frame **) &cf);
skb = alloc_can_skb(ndev, (struct can_frame **)&cf);
if (unlikely(!skb)) {
int i;
......@@ -403,8 +395,7 @@ static void ctucan_err_interrupt(struct net_device *ndev,
skb = alloc_can_err_skb(ndev, &cf);
/*
* EWI: error warning
/* EWI: error warning
* DOI: RX overrun
* EPI: error passive or bus off
* ALI: arbitration lost (just informative)
......@@ -489,7 +480,7 @@ err_warning:
*/
#ifdef DEBUG
netdev_info(ndev, " DOS=%d after COMMAND[CDR]",
ctu_can_get_status(&priv->p).s.dor);
ctu_can_get_status(&priv->p).s.dor);
#endif
/* And clear the DOI flag again */
......@@ -544,7 +535,7 @@ static int ctucan_rx_poll(struct napi_struct *napi, int quota)
u32 framecnt = ctu_can_fd_get_rx_frame_count(&priv->p);
netdev_dbg(ndev, "rx_poll: RBNEI set, %d frames in RX FIFO",
framecnt);
framecnt);
if (framecnt == 0) {
netdev_err(ndev, "rx_poll: RBNEI set, but there are no frames in the FIFO!");
break;
......@@ -577,7 +568,7 @@ static void ctucan_rotate_txb_prio(struct net_device *ndev)
u32 prio = priv->txb_prio;
u32 nbuffersm1 = priv->txb_mask; /* nbuffers - 1 */
prio = (prio << 4) | ((prio >> (nbuffersm1*4)) & 0xF);
prio = (prio << 4) | ((prio >> (nbuffersm1 * 4)) & 0xF);
netdev_dbg(ndev, "%s: from 0x%08x to 0x%08x",
__func__, priv->txb_prio, prio);
priv->txb_prio = prio;
......@@ -599,15 +590,13 @@ static void ctucan_tx_interrupt(struct net_device *ndev)
netdev_dbg(ndev, "%s", __func__);
/*
* read tx_status
/* read tx_status
* if txb[n].finished (bit 2)
* if ok -> echo
* if error / aborted -> ?? (find how to handle oneshot mode)
* txb_tail++
*/
icr.u32 = 0;
icr.s.txbhci = 1;
do {
......@@ -801,18 +790,12 @@ static int ctucan_open(struct net_device *ndev)
ret = pm_runtime_get_sync(priv->dev);
if (ret < 0) {
netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",
__func__, ret);
__func__, ret);
return ret;
}
/*
* ret = ctucan_reset(ndev);
* if (ret < 0)
* goto err;
*/
ret = request_irq(ndev->irq, ctucan_interrupt, priv->irq_flags,
ndev->name, ndev);
ndev->name, ndev);
if (ret < 0) {
netdev_err(ndev, "irq allocation for CAN failed\n");
goto err;
......@@ -881,7 +864,7 @@ static int ctucan_close(struct net_device *ndev)
* Return: 0 on success and failure value on error
*/
static int ctucan_get_berr_counter(const struct net_device *ndev,
struct can_berr_counter *bec)
struct can_berr_counter *bec)
{
struct ctucan_priv *priv = netdev_priv(ndev);
int ret;
......@@ -891,7 +874,7 @@ static int ctucan_get_berr_counter(const struct net_device *ndev,
ret = pm_runtime_get_sync(priv->dev);
if (ret < 0) {
netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",
__func__, ret);
__func__, ret);
return ret;
}
......@@ -943,12 +926,10 @@ static __maybe_unused int ctucan_resume(struct device *dev)
return 0;
}
static const struct dev_pm_ops ctucan_dev_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(ctucan_suspend, ctucan_resume)
};
/**
* ctucan_probe_common - Device type independent registration call
*
......@@ -966,9 +947,9 @@ static const struct dev_pm_ops ctucan_dev_pm_ops = {
* Return: 0 on success and failure value on error
*/
static int ctucan_probe_common(struct device *dev, void __iomem *addr,
int irq, unsigned int ntxbufs, unsigned long can_clk_rate,
int pm_enable_call, void (*set_drvdata_fnc)(struct device *dev,
struct net_device *ndev))
int irq, unsigned int ntxbufs, unsigned long can_clk_rate,
int pm_enable_call, void (*set_drvdata_fnc)(struct device *dev,
struct net_device *ndev))
{
struct ctucan_priv *priv;
struct net_device *ndev;
......@@ -981,7 +962,7 @@ static int ctucan_probe_common(struct device *dev, void __iomem *addr,
priv = netdev_priv(ndev);
INIT_LIST_HEAD(&priv->peers_on_pdev);
priv->txb_mask = ntxbufs-1;
priv->txb_mask = ntxbufs - 1;
priv->dev = dev;
priv->can.bittiming_const = &ctu_can_fd_bit_timing_max;
priv->can.data_bittiming_const = &ctu_can_fd_bit_timing_data_max;
......@@ -1030,7 +1011,7 @@ static int ctucan_probe_common(struct device *dev, void __iomem *addr,
ret = pm_runtime_get_sync(dev);
if (ret < 0) {
netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",
__func__, ret);
__func__, ret);
goto err_pmdisable;
}
......@@ -1064,8 +1045,8 @@ static int ctucan_probe_common(struct device *dev, void __iomem *addr,
pm_runtime_put(dev);
netdev_dbg(ndev, "mem_base=0x%p irq=%d clock=%d, txb mask:%d\n",
priv->p.mem_base, ndev->irq, priv->can.clock.freq,
priv->txb_mask);
priv->p.mem_base, ndev->irq, priv->can.clock.freq,
priv->txb_mask);
return 0;
......@@ -1083,7 +1064,7 @@ err_free:
#ifdef CONFIG_OF
static void ctucan_platform_set_drvdata(struct device *dev,
struct net_device *ndev)
struct net_device *ndev)
{
struct platform_device *pdev = container_of(dev, struct platform_device,
dev);
......@@ -1125,7 +1106,7 @@ static int ctucan_platform_probe(struct platform_device *pdev)
}
/*
ret = of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth", &tx_max);
ret = of_property_read_u32(pdev->dev.of_node, "tntxbufs", &ntxbufs);
if (ret < 0)
goto err;
*/
......@@ -1162,7 +1143,6 @@ static int ctucan_platform_remove(struct platform_device *pdev)
return 0;
}
/* Match table for OF platform binding */
static const struct of_device_id ctucan_of_match[] = {
{ .compatible = "ctu,canfd-2", },
......@@ -1191,7 +1171,8 @@ module_platform_driver(ctucanfd_driver);
#ifndef PCI_DEVICE_DATA
#define PCI_DEVICE_DATA(vend, dev, data) \
.vendor = PCI_VENDOR_ID_##vend, .device = PCI_DEVICE_ID_##vend##_##dev, \
.vendor = PCI_VENDOR_ID_##vend, \
.device = PCI_DEVICE_ID_##vend##_##dev, \
.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0, \
.driver_data = (kernel_ulong_t)(data)
#endif
......@@ -1223,7 +1204,7 @@ struct ctucan_pci_board_data *ctucan_pci_get_bdata(struct pci_dev *pdev)
}
static void ctucan_pci_set_drvdata(struct device *dev,
struct net_device *ndev)
struct net_device *ndev)
{
struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
struct ctucan_priv *priv = netdev_priv(ndev);
......@@ -1282,12 +1263,12 @@ static int ctucan_pci_probe(struct pci_dev *pdev,
}
dev_info(dev, "ctucan BAR0 0x%08llx 0x%08llx\n",
(long long)pci_resource_start(pdev, 0),
(long long)pci_resource_len(pdev, 0));
(long long)pci_resource_start(pdev, 0),
(long long)pci_resource_len(pdev, 0));
dev_info(dev, "ctucan BAR1 0x%08llx 0x%08llx\n",
(long long)pci_resource_start(pdev, 1),
(long long)pci_resource_len(pdev, 1));
(long long)pci_resource_start(pdev, 1),
(long long)pci_resource_len(pdev, 1));
addr = pci_iomap(pdev, 1, pci_resource_len(pdev, 1));
if (!addr) {
......@@ -1343,10 +1324,10 @@ static int ctucan_pci_probe(struct pci_dev *pdev,
while (pci_use_second && (core_i < num_cores)) {
addr += 0x4000;
ret = ctucan_probe_common(dev, addr, irq, ntxbufs, 100000000,
0, ctucan_pci_set_drvdata);
0, ctucan_pci_set_drvdata);
if (ret < 0) {
dev_info(dev, "CTU CAN FD core %d initialization failed\n",
core_i);
core_i);
break;
}
core_i++;
......@@ -1409,10 +1390,8 @@ static void ctucan_pci_remove(struct pci_dev *pdev)
if (bdata->cra_base)
iowrite32(0, (char *)bdata->cra_base + CYCLONE_IV_CRA_A2P_IE);
while ((priv = list_first_entry_or_null(&bdata->ndev_list_head,
struct ctucan_priv, peers_on_pdev)) != NULL) {
struct ctucan_priv, peers_on_pdev)) != NULL) {
ndev = priv->can.dev;
unregister_candev(ndev);
......@@ -1448,6 +1427,7 @@ static const struct pci_device_id ctucan_pci_tbl[] = {
CTUCAN_WITH_CTUCAN_ID)},
{},
};
static struct pci_driver ctucan_pci_driver = {
.name = KBUILD_MODNAME,
.id_table = ctucan_pci_tbl,
......
......@@ -68,14 +68,12 @@ u32 ctu_can_fd_read32_be(struct ctucanfd_priv *priv,
}
static void ctu_can_fd_write_txt_buf(struct ctucanfd_priv *priv,
enum ctu_can_fd_can_registers buf_base,
u32 offset, u32 val)
enum ctu_can_fd_can_registers buf_base,
u32 offset, u32 val)
{
priv->write_reg(priv, buf_base + offset, val);
}
static inline union ctu_can_fd_identifier_w ctu_can_fd_id_to_hwid(canid_t id)
{
union ctu_can_fd_identifier_w hwid;
......@@ -87,8 +85,9 @@ static inline union ctu_can_fd_identifier_w ctu_can_fd_id_to_hwid(canid_t id)
/* getting lowest 18 bits, replace with sth nicer... */
hwid.s.identifier_ext = (id & 0x3FFFF);
} else
} else {
hwid.s.identifier_base = id & CAN_SFF_MASK;
}
return hwid;
}
......@@ -104,19 +103,17 @@ static inline void ctu_can_fd_hwid_to_id(union ctu_can_fd_identifier_w hwid,
*id |= CAN_EFF_FLAG;
*id |= hwid.s.identifier_base << 18;
*id |= hwid.s.identifier_ext;
} else
} else {
*id = hwid.s.identifier_base;
}
}
// TODO: use can_len2dlc
static bool ctu_can_fd_len_to_dlc(u8 len, u8 *dlc)
{
*dlc = can_len2dlc(len);
return true;
}
bool ctu_can_fd_check_access(struct ctucanfd_priv *priv)
{
union ctu_can_fd_device_id_version reg;
......@@ -279,14 +276,14 @@ void ctu_can_fd_set_mode(struct ctucanfd_priv *priv,
if (mode->mask & CAN_CTRLMODE_BERR_REPORTING) {
union ctu_can_fd_int_stat ena, mask;
ena.u32 = mask.u32 = 0;
ena.u32 = 0;
mask.u32 = 0;
ena.s.bei = !!(mode->flags & CAN_CTRLMODE_ONE_SHOT);
mask.s.bei = 1;
ctu_can_fd_int_ena(priv, ena, mask);
}
}
const struct can_bittiming_const ctu_can_fd_bit_timing_max = {
.name = "ctu_can_fd",
.tseg1_min = 2,
......@@ -316,8 +313,7 @@ void ctu_can_fd_set_nom_bittiming(struct ctucanfd_priv *priv,
{
union ctu_can_fd_btr btr;
/*
* The timing calculation functions have only constraints on tseg1,
/* The timing calculation functions have only constraints on tseg1,
* which is prop_seg + phase1_seg combined. tseg1 is then split in half
* and stored into prog_seg and phase_seg1. In CTU CAN FD, PROP is
* 7 bits wide but PH1 only 6, so we must re-distribute the values here.
......@@ -347,8 +343,7 @@ void ctu_can_fd_set_data_bittiming(struct ctucanfd_priv *priv,
{
union ctu_can_fd_btr_fd btr_fd;
/*
* The timing calculation functions have only constraints on tseg1,
/* The timing calculation functions have only constraints on tseg1,
* which is prop_seg + phase1_seg combined. tseg1 is then split in half
* and stored into prog_seg and phase_seg1. In CTU CAN FD, PROP_FD is
* 6 bits wide but PH1_FD only 5, so we must re-distribute the values
......@@ -410,10 +405,11 @@ enum can_state ctu_can_fd_read_error_state(struct ctucanfd_priv *priv)
return CAN_STATE_ERROR_ACTIVE;
else
return CAN_STATE_ERROR_WARNING;
} else if (reg.s.erp)
} else if (reg.s.erp) {
return CAN_STATE_ERROR_PASSIVE;
else if (reg.s.bof)
} else if (reg.s.bof) {
return CAN_STATE_BUS_OFF;
}
WARN(true, "Invalid error state");
return CAN_STATE_ERROR_PASSIVE;
}
......@@ -435,7 +431,6 @@ void ctu_can_fd_set_err_ctrs(struct ctucanfd_priv *priv,
priv->write_reg(priv, CTU_CAN_FD_CTR_PRES, reg.u32);
}
bool ctu_can_fd_get_mask_filter_support(struct ctucanfd_priv *priv, u8 fnum)
{
union ctu_can_fd_filter_control_filter_status reg;
......@@ -568,8 +563,8 @@ void ctu_can_fd_read_rx_frame(struct ctucanfd_priv *priv,
}
void ctu_can_fd_read_rx_frame_ffw(struct ctucanfd_priv *priv,
struct canfd_frame *cf, u64 *ts,
union ctu_can_fd_frame_form_w ffw)
struct canfd_frame *cf, u64 *ts,
union ctu_can_fd_frame_form_w ffw)
{
union ctu_can_fd_identifier_w idw;
unsigned int i;
......@@ -585,8 +580,9 @@ void ctu_can_fd_read_rx_frame_ffw(struct ctucanfd_priv *priv,
cf->flags |= CANFD_BRS;
if (ffw.s.esi_rsv == ESI_ERR_PASIVE)
cf->flags |= CANFD_ESI;
} else if (ffw.s.rtr == RTR_FRAME)
} else if (ffw.s.rtr == RTR_FRAME) {
cf->can_id |= CAN_RTR_FLAG;
}
/* DLC */
if (ffw.s.dlc <= 8) {
......@@ -598,7 +594,7 @@ void ctu_can_fd_read_rx_frame_ffw(struct ctucanfd_priv *priv,
cf->len = 8;
}
ide = (enum ctu_can_fd_frame_form_w_ide) ffw.s.ide;
ide = (enum ctu_can_fd_frame_form_w_ide)ffw.s.ide;
ctu_can_fd_hwid_to_id(idw, &cf->can_id, ide);
/* Timestamp */
......@@ -636,7 +632,7 @@ enum ctu_can_fd_tx_status_tx1s ctu_can_fd_get_tx_status(struct ctucanfd_priv
default:
status = ~0;
}
return (enum ctu_can_fd_tx_status_tx1s) status;
return (enum ctu_can_fd_tx_status_tx1s)status;
}
bool ctu_can_fd_is_txt_buf_accessible(struct ctucanfd_priv *priv, u8 buf)
......@@ -644,8 +640,8 @@ bool ctu_can_fd_is_txt_buf_accessible(struct ctucanfd_priv *priv, u8 buf)
enum ctu_can_fd_tx_status_tx1s buf_status;
buf_status = ctu_can_fd_get_tx_status(priv, buf);
if (buf_status == TXT_RDY || buf_status == TXT_TRAN
|| buf_status == TXT_ABTP)
if (buf_status == TXT_RDY || buf_status == TXT_TRAN ||
buf_status == TXT_ABTP)
return false;
return true;
......@@ -780,15 +776,15 @@ u64 ctu_can_fd_read_timestamp(struct ctucanfd_priv *priv)
union ctu_can_fd_timestamp_high ts_high;
union ctu_can_fd_timestamp_high ts_high_2;
ts_high.u32 = priv->read_reg(priv, CTU_CAN_FD_TIMESTAMP_HIGH);
ts_low.u32 = priv->read_reg(priv, CTU_CAN_FD_TIMESTAMP_LOW);
ts_high.u32 = priv->read_reg(priv, CTU_CAN_FD_TIMESTAMP_HIGH);
ts_low.u32 = priv->read_reg(priv, CTU_CAN_FD_TIMESTAMP_LOW);
ts_high_2.u32 = priv->read_reg(priv, CTU_CAN_FD_TIMESTAMP_HIGH);
if (ts_high.u32 != ts_high_2.u32){
if (ts_high.u32 != ts_high_2.u32) {
ts_low.u32 = priv->read_reg(priv, CTU_CAN_FD_TIMESTAMP_LOW);
}
return (( (u64) ts_high_2.u32) << 32) | ( (u64) ts_low.u32);
return (((u64)ts_high_2.u32) << 32) | ((u64)ts_low.u32);
}
// TODO: AL_CAPTURE and ERROR_CAPTURE
......@@ -47,7 +47,7 @@
/*
MJ TODO:
+ move small functions to *.h, make them inline
+ consider move of more small functions to *.h, make them inline
+ either pass union arguments by value or just as u32;
this way they are forced on stack instead of passing in register
+ one level of pointer indirection, which sucks performance-wise
......@@ -96,7 +96,6 @@
// True if RX Buffer is not empty
#define CTU_CAN_FD_RX_BUF_NEMPTY(stat) (!!(stat).s.rxne)
/*
* Interrupt macros -> pass "ctu_can_fd_int_sts" result
*/
......@@ -159,7 +158,6 @@ u32 ctu_can_fd_read32(struct ctucanfd_priv *priv,
u32 ctu_can_fd_read32_be(struct ctucanfd_priv *priv,
enum ctu_can_fd_can_registers reg);
/*
* Checks whether the core is mapped correctly at it's base address.
*
......@@ -171,7 +169,6 @@ u32 ctu_can_fd_read32_be(struct ctucanfd_priv *priv,
*/
bool ctu_can_fd_check_access(struct ctucanfd_priv *priv);
/*
* Returns version of CTU CAN FD IP Core.
*
......@@ -183,7 +180,6 @@ bool ctu_can_fd_check_access(struct ctucanfd_priv *priv);
*/
u32 ctu_can_fd_get_version(struct ctucanfd_priv *priv);
/*
* Enables/disables the operation of CTU CAN FD Core. If disabled, the Core will
* never start transmitting on the CAN bus, nor receiving.
......@@ -194,7 +190,6 @@ u32 ctu_can_fd_get_version(struct ctucanfd_priv *priv);
*/
void ctu_can_fd_enable(struct ctucanfd_priv *priv, bool enable);
/*
* Resets the CTU CAN FD Core.
* NOTE: After resetting, you must wait until ctu_can_fd_check_access()
......@@ -205,7 +200,6 @@ void ctu_can_fd_enable(struct ctucanfd_priv *priv, bool enable);
*/
void ctu_can_fd_reset(struct ctucanfd_priv *priv);
/*
* Configures CTU CAN FD Core to limit the amount of retransmit attempts after
* occurence of error (Error frame, Arbitration lost). If retransmit limit is
......@@ -223,7 +217,6 @@ void ctu_can_fd_reset(struct ctucanfd_priv *priv);
bool ctu_can_fd_set_ret_limit(struct ctucanfd_priv *priv, bool enable,
u8 limit);
/*
* Configures CTU CAN FD Core for special operating modes by access to MODE
* register. Following flags from "mode" are not configured by this function:
......@@ -251,7 +244,6 @@ bool ctu_can_fd_set_ret_limit(struct ctucanfd_priv *priv, bool enable,
void ctu_can_fd_set_mode_reg(struct ctucanfd_priv *priv,
const struct can_ctrlmode *mode);
/*
* Gives command to CTU CAN FD Core to erase and reset the RX FIFO. This
* action is finished immediately and does not need waiting.
......@@ -261,7 +253,6 @@ void ctu_can_fd_set_mode_reg(struct ctucanfd_priv *priv,
*/
void ctu_can_fd_rel_rx_buf(struct ctucanfd_priv *priv);
/*
* Gives command to CTU CAN FD Core to clear the Data overrun flag on
* the RX FIFO Buffer.
......@@ -271,7 +262,6 @@ void ctu_can_fd_rel_rx_buf(struct ctucanfd_priv *priv);
*/
void ctu_can_fd_clr_overrun_flag(struct ctucanfd_priv *priv);
/*
* Gives command to CTU CAN FD Core to abort the transmission immediately.
* This action will most likely result in transmission of Error frame.
......@@ -281,7 +271,6 @@ void ctu_can_fd_clr_overrun_flag(struct ctucanfd_priv *priv);
*/
void ctu_can_fd_abort_tx(struct ctucanfd_priv *priv);
/*
* Returns mode/status vector of CTU CAN FD Core.
*
......@@ -301,7 +290,6 @@ static inline union ctu_can_fd_status
return res;
}
/*
* Test if core is enabled..
*
......@@ -319,7 +307,6 @@ static inline bool ctu_can_fd_is_enabled(struct ctucanfd_priv *priv)
return reg.s.ena == CTU_CAN_ENABLED;
}
/*
* Reads the interrupt status vector from CTU CAN FD Core.
*
......@@ -338,7 +325,6 @@ static inline union ctu_can_fd_int_stat
return res;
}
/*
* Clears the interrupts from CTU CAN FD Core.
*
......@@ -352,7 +338,6 @@ static inline void ctu_can_fd_int_clr(struct ctucanfd_priv *priv,
priv->write_reg(priv, CTU_CAN_FD_INT_STAT, mask.u32);
}
/*
* Sets enable interrupt bits.
*
......@@ -366,7 +351,6 @@ static inline void ctu_can_fd_int_ena_set(struct ctucanfd_priv *priv,
priv->write_reg(priv, CTU_CAN_FD_INT_ENA_SET, mask.u32);
}
/*
* Clears enable interrupt bits.
*
......@@ -380,7 +364,6 @@ static inline void ctu_can_fd_int_ena_clr(struct ctucanfd_priv *priv,
priv->write_reg(priv, CTU_CAN_FD_INT_ENA_CLR, mask.u32);
}
/*
* Enable/Disable interrupts of CTU CAN FD Core.
*
......@@ -393,7 +376,6 @@ void ctu_can_fd_int_ena(struct ctucanfd_priv *priv,
union ctu_can_fd_int_stat mask,
union ctu_can_fd_int_stat val);
/*
* Mask/Unmask interrupts of CTU CAN FD Core.
*
......@@ -406,7 +388,6 @@ void ctu_can_fd_int_mask(struct ctucanfd_priv *priv,
union ctu_can_fd_int_stat mask,
union ctu_can_fd_int_stat val);
/*
* Set the modes of CTU CAN FD IP Core. All flags from "ctu_can_fd_set_mode_reg"
* are configured, plus CAN_CTRLMODE_ONE_SHOT, CAN_CTRLMODE_BERR_REPORTING,
......@@ -419,7 +400,6 @@ void ctu_can_fd_int_mask(struct ctucanfd_priv *priv,
void ctu_can_fd_set_mode(struct ctucanfd_priv *priv,
const struct can_ctrlmode *mode);
/*
* Set Nominal bit timing of CTU CAN FD Core.
* NOTE: phase_seg1 and prop_seg may be modified if phase_seg1 > 63
......@@ -433,11 +413,11 @@ void ctu_can_fd_set_mode(struct ctucanfd_priv *priv,
void ctu_can_fd_set_nom_bittiming(struct ctucanfd_priv *priv,
struct can_bittiming *nbt);
/*
* Set Data bit timing of CTU CAN FD Core.
* NOTE: phase_seg1 and prop_seg may be modified if phase_seg1 > 63
* This is because in Linux, the constraints are only on phase_seg1+prop_seg.
* This is because in Linux, the constraints are only
* on phase_seg1+prop_seg.
*
* Arguments:
* priv Private info
......@@ -446,7 +426,6 @@ void ctu_can_fd_set_nom_bittiming(struct ctucanfd_priv *priv,
void ctu_can_fd_set_data_bittiming(struct ctucanfd_priv *priv,
struct can_bittiming *dbt);
/*
* Set error limit when CTU CAN FD Core should transfer to Error warning
* and error passive states. If any of RX/TX counters reach this value
......@@ -460,7 +439,6 @@ void ctu_can_fd_set_data_bittiming(struct ctucanfd_priv *priv,
*/