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canbus
CTU CAN FD IP Core
Commits
cd7afc6d
Commit
cd7afc6d
authored
Feb 06, 2018
by
Ille, Ondrej, Ing.
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Added new script, register map update
parent
af1bc2d2
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+85
-3
scripts/update_reg_map.py
scripts/update_reg_map.py
+83
-0
spec/CTU/ip/CAN_FD_IP_Core/2.1/CAN_FD_IP_Core.2.1.xml
spec/CTU/ip/CAN_FD_IP_Core/2.1/CAN_FD_IP_Core.2.1.xml
+2
-3
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scripts/update_reg_map.py
0 → 100644
View file @
cd7afc6d
################################################################################
##
## CAN with Flexible Data-Rate IP Core
##
## Copyright (C) 2017 Ondrej Ille <ondrej.ille@gmail.com>
##
## Script for complete update of register map. This script generates C header,
## VHDL packages and Lyx documentation.
##
## Arguments:
## xactSpec - Path to a IP-XACT specification file with register maps
## updVHDL - Whether VHDL constant definitions should be generated
## (../src/Libraries)
## updHeader - Whether C header file should be generated
## (../driver)
## updDocs - Whether Lyx doocumentation should be generated.
## (../doc/core)
##
## Revision history:
## 06.02.2018 Implemented the script
##
################################################################################
import
argparse
import
sys
import
time
import
importlib.util
import
os
import
inspect
import
math
from
pyXact_generator.gen_lib
import
*
from
gen_c_header
import
*
from
gen_lyx_docu
import
*
import
gen_vhdl_package
def
parse_args
():
parser
=
argparse
.
ArgumentParser
(
description
=
"""Script for complete update of register map.
This script generates C header,
VHDL packages and Lyx documentation."""
)
parser
.
add_argument
(
'--xactSpec'
,
dest
=
'xactSpec'
,
help
=
"""Path to a IP-XACT
specification file with register maps"""
)
parser
.
add_argument
(
'--updVHDL'
,
dest
=
'updVHDL'
,
help
=
""" Whether VHDL
constant definitions should be generated
(../src/Libraries)"""
)
parser
.
add_argument
(
'--updHeader'
,
dest
=
'updHeader'
,
help
=
""" Whether C
header file should be generated
(../driver)"""
)
parser
.
add_argument
(
'--updDocs'
,
dest
=
'updDocs'
,
help
=
"""Whether Lyx
doocumentation should be generated.
(../doc/core)"""
)
return
parser
.
parse_args
();
if
__name__
==
'__main__'
:
args
=
parse_args
()
print
(
80
*
"*"
)
print
(
"** Generating CAN FD register map"
)
print
(
80
*
"*"
)
if
(
str_arg_to_bool
(
args
.
updVHDL
)):
print
(
"Generating CAN FD memory registers VHDL package...
\n
"
)
os
.
system
(
"""py gen_vhdl_package.py --licPath ../LICENSE --xactSpec {} --fieldMap CAN_FD_8bit_regs --addrMap CAN_FD_8bit_regs --wordWidth 32 --outFile ../src/Libraries/CAN_FD_register_map.vhd --packName CAN_FD_register_map"""
.
format
(
args
.
xactSpec
))
os
.
system
(
"""py gen_vhdl_package.py --licPath ../LICENSE --xactSpec {} --fieldMap CAN_FD_frame_format --addrMap CAN_FD_frame_format --wordWidth 32 --outFile ../src/Libraries/CAN_FD_frame_format.vhd --packName CAN_FD_frame_format"""
.
format
(
args
.
xactSpec
))
print
(
"
\n
Done
\n
"
)
if
(
str_arg_to_bool
(
args
.
updHeader
)):
print
(
"Generating CAN FD memory registers Header file...
\n
"
)
os
.
system
(
"""py gen_c_header.py --licPath ../LICENSE --xactSpec {} --addrMap CAN_FD_8bit_regs --fieldMap CAN_FD_8bit_regs --wordWidth 32 --outFile ../driver/kernel_header_draft.h --headName CAN_FD_frame_format"""
.
format
(
args
.
xactSpec
))
print
(
"
\n
Done
\n
"
)
if
(
str_arg_to_bool
(
args
.
updDocs
)):
print
(
"Generating CAN FD memory registers Documentation...
\n
"
)
os
.
system
(
"""py gen_lyx_docu.py --xactSpec {} --memMap CAN_FD_8bit_regs --wordWidth 32 --lyxTemplate ../doc/core/template.lyx --outFile ../doc/core/registerMap.lyx --chaptName "Register map" --genRegions True --genFiDesc True"""
.
format
(
args
.
xactSpec
))
os
.
system
(
"""py gen_lyx_docu.py --xactSpec {} --memMap CAN_FD_frame_format --wordWidth 32 --lyxTemplate ../doc/core/template.lyx --outFile ../doc/core/CANFrameFormat.lyx --chaptName "CAN Frame format" --genRegions False --genFiDesc True"""
.
format
(
args
.
xactSpec
))
print
(
"
\n
Done
\n
"
)
print
(
80
*
"*"
)
print
(
"** Finished"
)
print
(
80
*
"*"
)
\ No newline at end of file
spec/CTU/ip/CAN_FD_IP_Core/2.1/CAN_FD_IP_Core.2.1.xml
View file @
cd7afc6d
...
...
@@ -3664,12 +3664,11 @@
</ipxact:memoryMap>
<ipxact:memoryMap>
<ipxact:name>
CAN_FD_frame_format
</ipxact:name>
<ipxact:displayName>
CAN
_
FD
_
frame
_
format
</ipxact:displayName>
<ipxact:description>
CAN Frame format describtion in
TXT
and RX Buffer.
</ipxact:description>
<ipxact:displayName>
5.
CAN
FD
frame
format
</ipxact:displayName>
<ipxact:description>
CAN Frame format describtion in
as it is stored in TXT Buffers
and RX Buffer.
</ipxact:description>
<ipxact:addressBlock>
<ipxact:name>
CAN_FD_Frame_format
</ipxact:name>
<ipxact:displayName>
CAN FD Frame format
</ipxact:displayName>
<ipxact:description>
Register map with description of CAN Frame memory layout.
</ipxact:description>
<ipxact:baseAddress>
'h0
</ipxact:baseAddress>
<ipxact:range>
80
</ipxact:range>
<ipxact:width>
32
</ipxact:width>
...
...
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