Commit ca9da786 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

Bench fix. We must wait for one clock cycle less. If We wait

for 3, we wont start the transmission right after the Intermission
by Node 2, because the frame will be inserted after sample point,
and thus Node 2 will send it after 1 bit of being Idle.
parent 91de9a0f
Pipeline #2003 passed with stages
in 5 minutes and 21 seconds