Commit bc2cd4d6 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

src: Correct and clarify Bit Error Handling.

parent 9f011bdf
Pipeline #9472 failed with stages
...@@ -1429,7 +1429,7 @@ begin ...@@ -1429,7 +1429,7 @@ begin
else else
case curr_state is case curr_state is
------------------------------------------------------------------- -------------------------------------------------------------------
-- Unit is Off (drv_ena = '0') -- Unit is Off (drv_ena = '0')
------------------------------------------------------------------- -------------------------------------------------------------------
...@@ -1465,6 +1465,7 @@ begin ...@@ -1465,6 +1465,7 @@ begin
-- Start of frame -- Start of frame
------------------------------------------------------------------- -------------------------------------------------------------------
when s_pc_sof => when s_pc_sof =>
bit_err_disable <= '1';
ctrl_ctr_pload_i <= '1'; ctrl_ctr_pload_i <= '1';
ctrl_ctr_pload_val <= C_BASE_ID_DURATION; ctrl_ctr_pload_val <= C_BASE_ID_DURATION;
tx_load_base_id_i <= '1'; tx_load_base_id_i <= '1';
...@@ -1989,12 +1990,7 @@ begin ...@@ -1989,12 +1990,7 @@ begin
is_crc_delim <= '1'; is_crc_delim <= '1';
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
dbt_ctrs_en <= '1'; dbt_ctrs_en <= '1';
bit_err_disable <= '1';
-- If Transmitter sends ACK, receiving dominant is not bit
-- error!
if (is_transmitter = '1') then
bit_err_disable <= '1';
end if;
------------------------------------------------------------------- -------------------------------------------------------------------
-- ACK Slot, or a ACK delim, if previous two bits were recessive! -- ACK Slot, or a ACK delim, if previous two bits were recessive!
...@@ -2009,6 +2005,11 @@ begin ...@@ -2009,6 +2005,11 @@ begin
drv_ack_forb = '0') drv_ack_forb = '0')
then then
tx_dominant <= '1'; tx_dominant <= '1';
-- Bit Error still shall be detected when unit sends dominant
-- (receiver) and receives recessive!
else
bit_err_disable <= '1';
end if; end if;
if (is_transmitter = '1' and drv_self_test_ena = '0' and if (is_transmitter = '1' and drv_self_test_ena = '0' and
...@@ -2020,12 +2021,6 @@ begin ...@@ -2020,12 +2021,6 @@ begin
if (rx_data_nbs = DOMINANT) then if (rx_data_nbs = DOMINANT) then
ack_received <= '1'; ack_received <= '1';
end if; end if;
-- If Transmitter sends ACK, receiving dominant is not bit
-- error!
if (is_transmitter = '1') then
bit_err_disable <= '1';
end if;
------------------------------------------------------------------- -------------------------------------------------------------------
-- Secondary ACK field (in FD Frames),or ACK Delimiter if RECESSIVE -- Secondary ACK field (in FD Frames),or ACK Delimiter if RECESSIVE
...@@ -2034,6 +2029,7 @@ begin ...@@ -2034,6 +2029,7 @@ begin
err_pos <= ERC_POS_ACK; err_pos <= ERC_POS_ACK;
is_ack_field <= '1'; is_ack_field <= '1';
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
bit_err_disable <= '1';
if (rx_data_nbs = RECESSIVE) then if (rx_data_nbs = RECESSIVE) then
ctrl_ctr_pload_i <= '1'; ctrl_ctr_pload_i <= '1';
...@@ -2047,12 +2043,6 @@ begin ...@@ -2047,12 +2043,6 @@ begin
if (rx_data_nbs = DOMINANT) then if (rx_data_nbs = DOMINANT) then
ack_received <= '1'; ack_received <= '1';
end if; end if;
-- If Transmitter sends ACK, receiving dominant is not bit
-- error!
if (is_transmitter = '1') then
bit_err_disable <= '1';
end if;
------------------------------------------------------------------- -------------------------------------------------------------------
-- ACK Delimiter -- ACK Delimiter
...@@ -2063,6 +2053,7 @@ begin ...@@ -2063,6 +2053,7 @@ begin
err_pos <= ERC_POS_ACK; err_pos <= ERC_POS_ACK;
is_ack_delim <= '1'; is_ack_delim <= '1';
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
bit_err_disable <= '1';
if (rx_data_nbs = DOMINANT) then if (rx_data_nbs = DOMINANT) then
form_err_i <= '1'; form_err_i <= '1';
...@@ -2081,6 +2072,7 @@ begin ...@@ -2081,6 +2072,7 @@ begin
is_eof <= '1'; is_eof <= '1';
err_pos <= ERC_POS_INTF; err_pos <= ERC_POS_INTF;
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
bit_err_disable <= '1';
if (ctrl_ctr_zero = '1') then if (ctrl_ctr_zero = '1') then
ctrl_ctr_pload_i <= '1'; ctrl_ctr_pload_i <= '1';
...@@ -2100,10 +2092,6 @@ begin ...@@ -2100,10 +2092,6 @@ begin
end if; end if;
crc_clear_match_flag <= '1'; crc_clear_match_flag <= '1';
-- Detecting dominant during EOF is treated as form error!
elsif (rx_data_nbs = DOMINANT) then
form_err_i <= '1';
end if; end if;
-- If there is no error (RX Recessive) in one bit before end -- If there is no error (RX Recessive) in one bit before end
...@@ -2125,6 +2113,7 @@ begin ...@@ -2125,6 +2113,7 @@ begin
is_intermission <= '1'; is_intermission <= '1';
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
retr_ctr_add_block_clr <= '1'; retr_ctr_add_block_clr <= '1';
bit_err_disable <= '1';
-- Address Identifier Word in TXT Buffer RAM in advance to -- Address Identifier Word in TXT Buffer RAM in advance to
-- account for DFF delay and RAM delay! -- account for DFF delay and RAM delay!
...@@ -2287,7 +2276,7 @@ begin ...@@ -2287,7 +2276,7 @@ begin
reinteg_ctr_clr <= '1'; reinteg_ctr_clr <= '1';
ctrl_ctr_pload_val <= C_INTEGRATION_DURATION; ctrl_ctr_pload_val <= C_INTEGRATION_DURATION;
end if; end if;
------------------------------------------------------------------- -------------------------------------------------------------------
-- Unit is re-integrating, waiting till re-integration counter -- Unit is re-integrating, waiting till re-integration counter
-- expires! -- expires!
...@@ -2322,16 +2311,12 @@ begin ...@@ -2322,16 +2311,12 @@ begin
tx_dominant <= '1'; tx_dominant <= '1';
err_pos <= ERC_POS_ERR; err_pos <= ERC_POS_ERR;
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
if (ctrl_ctr_zero = '1') then if (ctrl_ctr_zero = '1') then
ctrl_ctr_pload_i <= '1'; ctrl_ctr_pload_i <= '1';
ctrl_ctr_pload_val <= C_DELIM_WAIT_DURATION; ctrl_ctr_pload_val <= C_DELIM_WAIT_DURATION;
first_err_delim_d <= '1'; first_err_delim_d <= '1';
end if; end if;
if (rx_data_nbs = RECESSIVE) then
form_err_i <= '1';
end if;
------------------------------------------------------------------- -------------------------------------------------------------------
-- Passive error flag. -- Passive error flag.
...@@ -2360,7 +2345,7 @@ begin ...@@ -2360,7 +2345,7 @@ begin
err_pos <= ERC_POS_ERR; err_pos <= ERC_POS_ERR;
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
-- When waiting for RECESSIVE bit after Error delimiter, unit -- When waiting for RECESSIVE bit after Error flag, unit
-- may receive DOMINANT and not interpret this as Bit error! -- may receive DOMINANT and not interpret this as Bit error!
bit_err_disable <= '1'; bit_err_disable <= '1';
...@@ -2394,6 +2379,7 @@ begin ...@@ -2394,6 +2379,7 @@ begin
ctrl_ctr_ena <= '1'; ctrl_ctr_ena <= '1';
err_pos <= ERC_POS_ERR; err_pos <= ERC_POS_ERR;
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
bit_err_disable <= '1';
if (ctrl_ctr_zero = '1') then if (ctrl_ctr_zero = '1') then
ctrl_ctr_pload_i <= '1'; ctrl_ctr_pload_i <= '1';
...@@ -2418,10 +2404,6 @@ begin ...@@ -2418,10 +2404,6 @@ begin
err_pos <= ERC_POS_OVRL; err_pos <= ERC_POS_OVRL;
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
if (rx_data_nbs = RECESSIVE) then
form_err_i <= '1';
end if;
------------------------------------------------------------------- -------------------------------------------------------------------
-- Wait till overload delimiter. -- Wait till overload delimiter.
------------------------------------------------------------------- -------------------------------------------------------------------
...@@ -2430,6 +2412,10 @@ begin ...@@ -2430,6 +2412,10 @@ begin
err_pos <= ERC_POS_OVRL; err_pos <= ERC_POS_OVRL;
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
-- When waiting for RECESSIVE bit after Overload flag, unit
-- may receive DOMINANT and not interpret this as Bit error!
bit_err_disable <= '1';
if (rx_data_nbs = RECESSIVE) then if (rx_data_nbs = RECESSIVE) then
ctrl_ctr_pload_i <= '1'; ctrl_ctr_pload_i <= '1';
ctrl_ctr_pload_val <= C_OVR_DELIM_DURATION; ctrl_ctr_pload_val <= C_OVR_DELIM_DURATION;
...@@ -2443,6 +2429,7 @@ begin ...@@ -2443,6 +2429,7 @@ begin
is_overload <= '1'; is_overload <= '1';
err_pos <= ERC_POS_OVRL; err_pos <= ERC_POS_OVRL;
nbt_ctrs_en <= '1'; nbt_ctrs_en <= '1';
bit_err_disable <= '1';
if (ctrl_ctr_zero = '1') then if (ctrl_ctr_zero = '1') then
ctrl_ctr_pload_i <= '1'; ctrl_ctr_pload_i <= '1';
......
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