diff --git a/test/feature/pkg_feature_exec_dispatch.vhd b/test/feature/pkg_feature_exec_dispatch.vhd
index 8a8fcfafe90ce9ab7c9476af0f2566efa0f9e318..fdecc633c9a63b95e129cac01a9d9c57d09a874c 100644
--- a/test/feature/pkg_feature_exec_dispatch.vhd
+++ b/test/feature/pkg_feature_exec_dispatch.vhd
@@ -53,6 +53,9 @@ package pkg_feature_exec_dispath is
     type feature_signal_outputs_t is record
         bl_inject           : std_logic;
         bl_force            : boolean;
+        crx_inject          : std_logic;
+        crx_force           : boolean;
+        crx_index           : natural range 1 to 2;
         ftr_tb_trv_delay    : t_ftr_tx_delay;
         ts_preset           : std_logic_vector(2 downto 1);
         ts_preset_val       : std_logic_vector(63 downto 0);
diff --git a/test/feature/tb_feature.vhd b/test/feature/tb_feature.vhd
index cf8848178413978ff9e272601a259db4a15c23eb..a31b19615406ed8fab55256ab3f68ea827bb03fb 100644
--- a/test/feature/tb_feature.vhd
+++ b/test/feature/tb_feature.vhd
@@ -89,6 +89,11 @@ entity CAN_feature_test is
         signal bl_inject        : in    std_logic;
         signal bl_force         : in    boolean;
         
+        -- CAN RX force values
+        signal crx_inject       : in    std_logic;
+        signal crx_force        : in    boolean;
+        signal crx_index        : in    natural range 1 to 2;
+        
         -- Transmitter delays
         signal transmitter_delays :in   t_ftr_tx_delay;
         
@@ -210,8 +215,11 @@ begin
 
         ---------------------------------
         --Transceiver and bus realization
-        ---------------------------------
-        xd: p(i).CAN_rx           <= s_bus_level;
+        ---------------------------------        
+        xd: p(i).CAN_rx           <= crx_inject when (crx_force and crx_index = i)
+                                                else
+                                     s_bus_level;
+
         xe: bus_level             <= s_bus_level;
         
         xf: iout(i).can_tx        <= p(i).CAN_tx;
@@ -367,6 +375,10 @@ architecture tb of tb_feature is
 
     signal bl_inject      : std_logic := RECESSIVE;
     signal bl_force       : boolean := false;
+    
+    signal crx_inject     : std_logic;
+    signal crx_force      : boolean;
+    signal crx_index      : natural range 1 to 2;
 
     -- Default delay of 110 ns is realistic for CAN transceivers! 
     signal ftr_tb_trv_delays     :   t_ftr_tx_delay := tran_delay_init;
@@ -387,6 +399,9 @@ architecture tb of tb_feature is
     signal so : feature_signal_outputs_t := (
         '0',
         false,
+        '0',
+        false,
+        1,
         ((
             11 * f100_Mhz * 1 ps,
             11 * f100_Mhz * 1 ps
@@ -400,6 +415,10 @@ begin
     bl_force  <= so.bl_force;
     ftr_tb_trv_delays <= so.ftr_tb_trv_delay;
 
+    crx_inject <= so.crx_inject;
+    crx_force <= so.crx_force;
+    crx_index <= so.crx_index;
+
     -- In this test wrapper generics are directly connected to the signals
     -- of test entity
     test_comp: entity work.CAN_feature_test
@@ -411,8 +430,14 @@ begin
         error_tol        =>  error_tol,
         status           =>  status_int,
         mem_bus          =>  mem_bus,
+        
         bl_inject        =>  bl_inject,
         bl_force         =>  bl_force,
+        
+        crx_inject       =>  crx_inject,
+        crx_force        =>  crx_force,
+        crx_index        =>  crx_index,
+        
         transmitter_delays =>  ftr_tb_trv_delays,
         
         ts_preset        => so.ts_preset,
diff --git a/test/lib/CANtestLib.vhd b/test/lib/CANtestLib.vhd
index 190e7dfc5d3d091e0c01a69782a9358725578bfa..05357c84a013533c925d70e3cbb03c32d0d2fc0e 100644
--- a/test/lib/CANtestLib.vhd
+++ b/test/lib/CANtestLib.vhd
@@ -948,6 +948,36 @@ package CANtestLib is
         signal  bl_force        : out   boolean
     );
 
+    ---------------------------------------------------------------------------
+    -- Force CAN RX of single controller to given value. This can be used when
+    -- only RX value of single node shall be forced to different value
+    --
+    -- Arguments:
+    --  value       Value to be forced
+    --  ID          ID of node on whose CAN_rx value will be forced
+    --  crx_force   Force CAN RX level signal.
+    --  crx_inject  Force CAN RX level value.
+    --  crx_index   Force CAN RX level index.
+    ---------------------------------------------------------------------------
+    procedure force_can_rx(
+        constant value           : in    std_logic;
+        constant ID              : in    natural range 1 to 2;
+        signal   crx_force       : out   boolean;
+        signal   crx_inject      : out   std_logic;
+        signal   crx_index       : out   natural range 1 to 2
+    );
+    
+    
+    ---------------------------------------------------------------------------
+    -- Release CAN_RX value.
+    --
+    -- Arguments:
+    --  crx_force   Force CAN RX level signal.
+    ---------------------------------------------------------------------------
+    procedure release_can_rx(
+       signal   crx_force        : out   boolean
+    );
+
 
     ----------------------------------------------------------------------------
     -- Memory access routines
@@ -2709,6 +2739,25 @@ package body CANtestLib is
         bl_force <= false;
     end procedure;
 
+    procedure force_can_rx(
+        constant value           : in    std_logic;
+        constant ID              : in    natural range 1 to 2;
+        signal   crx_force       : out   boolean;
+        signal   crx_inject      : out   std_logic;
+        signal   crx_index       : out   natural range 1 to 2
+    ) is
+    begin
+        crx_force <= true;
+        crx_inject <= value;
+        crx_index <= ID;
+    end procedure;
+
+    procedure release_can_rx(
+       signal   crx_force        : out   boolean
+    ) is
+    begin
+        crx_force <= false;
+    end procedure;
 
 
     procedure aval_write(