Commit 7f81dd28 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

test: Increase timeout for BTR testcase

parent ec1cb4da
Pipeline #14561 passed with stages
in 21 minutes and 51 seconds
...@@ -88,6 +88,7 @@ feature: ...@@ -88,6 +88,7 @@ feature:
retr_limit_2: retr_limit_2:
retr_limit_3: retr_limit_3:
one_shot: one_shot:
overload:
no_sof_tx: no_sof_tx:
rec_saturation: rec_saturation:
rx_settings_rtsop: rx_settings_rtsop:
...@@ -118,7 +119,6 @@ feature: ...@@ -118,7 +119,6 @@ feature:
tx_cmd_set_ready: tx_cmd_set_ready:
tx_priority: tx_priority:
iterations: 1 iterations: 1
overload:
reference: reference:
default: default:
<<: *default <<: *default
......
...@@ -78,6 +78,7 @@ feature: ...@@ -78,6 +78,7 @@ feature:
alc_ide: alc_ide:
alc_rtr_r0: alc_rtr_r0:
btr: btr:
timeout: 200 ms
iterations: 1 iterations: 1
btr_fd: btr_fd:
iterations: 3 iterations: 3
...@@ -120,6 +121,7 @@ feature: ...@@ -120,6 +121,7 @@ feature:
retr_limit_2: retr_limit_2:
retr_limit_3: retr_limit_3:
one_shot: one_shot:
overload:
no_sof_tx: no_sof_tx:
rec_saturation: rec_saturation:
rx_settings_rtsop: rx_settings_rtsop:
...@@ -152,7 +154,6 @@ feature: ...@@ -152,7 +154,6 @@ feature:
tx_cmd_set_ready: tx_cmd_set_ready:
tx_priority: tx_priority:
iterations: 5 iterations: 5
overload:
sanity: sanity:
default: default:
<<: *default <<: *default
......
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