Commit 6c4d54b4 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.
Browse files

Changed description of TXT Buffer HW CMD Interrupt generation

in IP-XACT.
parent 11302688
......@@ -5285,7 +5285,7 @@ BSI Bit-rate shifted interrupt
RBNEI Receive buffer not empty Interrupt. Clearing this interrupt and not reading out content of RX Buffer via RX_DATA will re-activate the interrupt.
\end_layout
\begin_layout Description
TXBHCI TX Buffer HW command interrupt. Anytime TX Buffer receives HW command from CAN Core, this interrupt will be acivated.
TXBHCI TX Buffer HW command interrupt. Anytime TX Buffer receives HW command from CAN Core which changes TXT Buffer state to TX Ok, Error or Aborted, this interrupt will be acivated.
\end_layout
\begin_layout Standard
\begin_inset VSpace bigskip
......
......@@ -687,7 +687,7 @@
<ipxact:field>
<ipxact:name>TXBHCI</ipxact:name>
<ipxact:displayName>TXBHCI</ipxact:displayName>
<ipxact:description>TX Buffer HW command interrupt. Anytime TX Buffer receives HW command from CAN Core, this interrupt will be acivated.</ipxact:description>
<ipxact:description>TX Buffer HW command interrupt. Anytime TX Buffer receives HW command from CAN Core which changes TXT Buffer state to TX Ok, Error or Aborted, this interrupt will be acivated.</ipxact:description>
<ipxact:bitOffset>11</ipxact:bitOffset>
<ipxact:resets>
<ipxact:reset>
......
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