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C
CTU CAN FD IP Core
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canbus
CTU CAN FD IP Core
Commits
6732a77f
Commit
6732a77f
authored
Jan 30, 2018
by
Martin Jeřábek
Browse files
Options
Browse Files
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Plain Diff
do not use std_logic_unsigned
parent
f081d560
Changes
60
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Showing
60 changed files
with
7 additions
and
69 deletions
+7
-69
src/Buffers_Message_Handling/messageFilter.vhd
src/Buffers_Message_Handling/messageFilter.vhd
+0
-1
src/Buffers_Message_Handling/rxBuffer.vhd
src/Buffers_Message_Handling/rxBuffer.vhd
+0
-1
src/Buffers_Message_Handling/txArbitrator.vhd
src/Buffers_Message_Handling/txArbitrator.vhd
+0
-1
src/Buffers_Message_Handling/txtBuffer.vhd
src/Buffers_Message_Handling/txtBuffer.vhd
+3
-4
src/Bus_Timing_Synchronisation/brs_comp.vhd
src/Bus_Timing_Synchronisation/brs_comp.vhd
+0
-1
src/Bus_Timing_Synchronisation/busSync.vhd
src/Bus_Timing_Synchronisation/busSync.vhd
+0
-1
src/Bus_Timing_Synchronisation/prescaler_v3.vhd
src/Bus_Timing_Synchronisation/prescaler_v3.vhd
+0
-1
src/CAN_Core/CRC.vhd
src/CAN_Core/CRC.vhd
+0
-1
src/CAN_Core/bitDeStuffing.vhd
src/CAN_Core/bitDeStuffing.vhd
+0
-1
src/CAN_Core/bitStuffing_v2.vhd
src/CAN_Core/bitStuffing_v2.vhd
+0
-1
src/CAN_Core/core_top.vhd
src/CAN_Core/core_top.vhd
+0
-1
src/CAN_Core/faultConf.vhd
src/CAN_Core/faultConf.vhd
+0
-1
src/CAN_Core/operationControl.vhd
src/CAN_Core/operationControl.vhd
+0
-1
src/CAN_Core/protocolControl.vhd
src/CAN_Core/protocolControl.vhd
+0
-1
src/CAN_Core/tranBuffer.vhd
src/CAN_Core/tranBuffer.vhd
+0
-1
src/CAN_top_level.vhd
src/CAN_top_level.vhd
+0
-1
src/Deprecated/timeStampGen.vhd
src/Deprecated/timeStampGen.vhd
+0
-1
src/Deprecated/txBuffer.vhd
src/Deprecated/txBuffer.vhd
+0
-1
src/Event_Logger/logger.vhd
src/Event_Logger/logger.vhd
+0
-1
src/ID_transfer.vhd
src/ID_transfer.vhd
+0
-1
src/Interrupts/intManager.vhd
src/Interrupts/intManager.vhd
+0
-1
src/Libraries/CANcomponents.vhd
src/Libraries/CANcomponents.vhd
+0
-1
src/Registers_Memory_Interface/canfd_registers.vhd
src/Registers_Memory_Interface/canfd_registers.vhd
+0
-1
test/feature/abort_transmittion_feature_tb.vhd
test/feature/abort_transmittion_feature_tb.vhd
+0
-1
test/feature/arbitration_feature_tb.vhd
test/feature/arbitration_feature_tb.vhd
+0
-1
test/feature/fault_confinement_feature_tb.vhd
test/feature/fault_confinement_feature_tb.vhd
+0
-1
test/feature/feature_env.vhd
test/feature/feature_env.vhd
+0
-2
test/feature/forbid_fd_feature_tb.vhd
test/feature/forbid_fd_feature_tb.vhd
+0
-1
test/feature/int_feature_tb.vhd
test/feature/int_feature_tb.vhd
+0
-1
test/feature/invalid_configs_feature_tb.vhd
test/feature/invalid_configs_feature_tb.vhd
+0
-1
test/feature/overload_feature_tb.vhd
test/feature/overload_feature_tb.vhd
+0
-1
test/feature/retr_limit_feature_tb.vhd
test/feature/retr_limit_feature_tb.vhd
+0
-1
test/feature/rtr_pref_feature.vhd
test/feature/rtr_pref_feature.vhd
+0
-1
test/feature/rx_status_feature_tb.vhd
test/feature/rx_status_feature_tb.vhd
+0
-1
test/feature/soft_reset_feature_tb.vhd
test/feature/soft_reset_feature_tb.vhd
+0
-1
test/feature/spec_mode_feature_tb.vhd
test/feature/spec_mode_feature_tb.vhd
+0
-1
test/feature/traf_meas_feature_tb.vhd
test/feature/traf_meas_feature_tb.vhd
+0
-1
test/feature/tran_delay_feature.vhd
test/feature/tran_delay_feature.vhd
+0
-1
test/feature/tx_arb_time_tran.vhd
test/feature/tx_arb_time_tran.vhd
+0
-1
test/lib/CANtestLib.vhd
test/lib/CANtestLib.vhd
+2
-4
test/lib/randomLib.vhd
test/lib/randomLib.vhd
+1
-2
test/others/busSync_tb_edge.vhd
test/others/busSync_tb_edge.vhd
+0
-1
test/others/busSync_tb_sample.vhd
test/others/busSync_tb_sample.vhd
+0
-1
test/others/core_top_tb1.vhd
test/others/core_top_tb1.vhd
+0
-1
test/others/prescaler_v3_tb.vhd
test/others/prescaler_v3_tb.vhd
+0
-1
test/others/registers_tb.vhd
test/others/registers_tb.vhd
+1
-2
test/others/timeStampGen_Tb.vhd
test/others/timeStampGen_Tb.vhd
+0
-1
test/sanity/sanity_test.vhd
test/sanity/sanity_test.vhd
+0
-1
test/unit/Bit_Stuffing/Bit_Stuffing_tb.vhd
test/unit/Bit_Stuffing/Bit_Stuffing_tb.vhd
+0
-1
test/unit/Bus_Sampling/Bus_Sync_tb.vhd
test/unit/Bus_Sampling/Bus_Sync_tb.vhd
+0
-1
test/unit/CRC/CRC_tb.vhd
test/unit/CRC/CRC_tb.vhd
+0
-1
test/unit/Evnt_Logger/Event_logger_tb.vhd
test/unit/Evnt_Logger/Event_logger_tb.vhd
+0
-1
test/unit/Int_Manager/Int_Manager_tb.vhd
test/unit/Int_Manager/Int_Manager_tb.vhd
+0
-1
test/unit/Message_filter/message_filter_tb.vhd
test/unit/Message_filter/message_filter_tb.vhd
+0
-1
test/unit/Prescaler/Prescaler_tb.vhd
test/unit/Prescaler/Prescaler_tb.vhd
+0
-1
test/unit/Protocol_Control/Protocol_Control_tb.vhd
test/unit/Protocol_Control/Protocol_Control_tb.vhd
+0
-1
test/unit/RX_Buffer/RX_Buffer_model.vhd
test/unit/RX_Buffer/RX_Buffer_model.vhd
+0
-1
test/unit/RX_Buffer/RX_Buffer_tb.vhd
test/unit/RX_Buffer/RX_Buffer_tb.vhd
+0
-1
test/unit/TX_Arbitrator/TX_Arbitrator_tb.vhd
test/unit/TX_Arbitrator/TX_Arbitrator_tb.vhd
+0
-1
test/unit/TX_Buffer/Tx_Buffer_tb.vhd
test/unit/TX_Buffer/Tx_Buffer_tb.vhd
+0
-1
No files found.
src/Buffers_Message_Handling/messageFilter.vhd
View file @
6732a77f
...
...
@@ -57,7 +57,6 @@
Library
ieee
;
use
IEEE
.
std_logic_1164
.
all
;
use
IEEE
.
numeric_std
.
ALL
;
use
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
ID_transfer
.
all
;
...
...
src/Buffers_Message_Handling/rxBuffer.vhd
View file @
6732a77f
...
...
@@ -96,7 +96,6 @@
Library
ieee
;
use
IEEE
.
std_logic_1164
.
all
;
use
IEEE
.
numeric_std
.
ALL
;
use
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
entity
rxBuffer
is
...
...
src/Buffers_Message_Handling/txArbitrator.vhd
View file @
6732a77f
...
...
@@ -70,7 +70,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
ID_transfer
.
all
;
...
...
src/Buffers_Message_Handling/txtBuffer.vhd
View file @
6732a77f
...
...
@@ -58,7 +58,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
entity
txtBuffer
is
...
...
@@ -198,14 +197,14 @@ begin
--Store the data into the Buffer during the access
if
(
tran_wr
(
ID
-1
)
=
'1'
)
then
if
(
t
ran_addr
<
4
)
then
if
(
t
o_integer
(
unsigned
(
tran_addr
))
<
4
)
then
txt_buffer_info
(
to_integer
(
unsigned
(
tran_addr
)))
<=
tran_data
;
else
txt_buffer_data
(
to_integer
(
unsigned
(
tran_addr
-4
))
)
<=
tran_data
;
txt_buffer_data
(
to_integer
(
unsigned
(
tran_addr
))
-4
)
<=
tran_data
;
end
if
;
end
if
;
end
if
;
end
process
;
end
architecture
;
\ No newline at end of file
end
architecture
;
src/Bus_Timing_Synchronisation/brs_comp.vhd
View file @
6732a77f
...
...
@@ -66,7 +66,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
WORK
.
CANconstants
.
ALL
;
package
brs_comp_package
is
...
...
src/Bus_Timing_Synchronisation/busSync.vhd
View file @
6732a77f
...
...
@@ -79,7 +79,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
WORK
.
CANconstants
.
ALL
;
use
work
.
CAN_FD_register_map
.
all
;
...
...
src/Bus_Timing_Synchronisation/prescaler_v3.vhd
View file @
6732a77f
...
...
@@ -106,7 +106,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
WORK
.
CANconstants
.
ALL
;
use
work
.
brs_comp_package
.
all
;
...
...
src/CAN_Core/CRC.vhd
View file @
6732a77f
...
...
@@ -57,7 +57,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CAN_FD_register_map
.
all
;
...
...
src/CAN_Core/bitDeStuffing.vhd
View file @
6732a77f
...
...
@@ -74,7 +74,6 @@
library
ieee
;
use
IEEE
.
std_logic_1164
.
all
;
use
IEEE
.
numeric_std
.
all
;
use
ieee
.
std_logic_unsigned
.
all
;
use
WORK
.
CANconstants
.
all
;
entity
bitDestuffing
is
...
...
src/CAN_Core/bitStuffing_v2.vhd
View file @
6732a77f
...
...
@@ -69,7 +69,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
WORK
.
CANconstants
.
ALL
;
entity
bitStuffing_v2
is
...
...
src/CAN_Core/core_top.vhd
View file @
6732a77f
...
...
@@ -73,7 +73,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
use
work
.
CAN_FD_frame_format
.
ALL
;
...
...
src/CAN_Core/faultConf.vhd
View file @
6732a77f
...
...
@@ -61,7 +61,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
WORK
.
CANconstants
.
ALL
;
entity
faultConf
is
...
...
src/CAN_Core/operationControl.vhd
View file @
6732a77f
...
...
@@ -48,7 +48,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CAN_FD_register_map
.
all
;
...
...
src/CAN_Core/protocolControl.vhd
View file @
6732a77f
...
...
@@ -165,7 +165,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CAN_FD_frame_format
.
all
;
use
work
.
CAN_FD_register_map
.
all
;
...
...
src/CAN_Core/tranBuffer.vhd
View file @
6732a77f
...
...
@@ -49,7 +49,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
entity
tranBuffer
is
...
...
src/CAN_top_level.vhd
View file @
6732a77f
...
...
@@ -67,7 +67,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
WORK
.
CANconstants
.
ALL
;
use
work
.
CANcomponents
.
ALL
;
...
...
src/Deprecated/timeStampGen.vhd
View file @
6732a77f
...
...
@@ -50,7 +50,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
entity
timeStampGen
is
...
...
src/Deprecated/txBuffer.vhd
View file @
6732a77f
...
...
@@ -42,7 +42,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
entity
txBuffer
is
...
...
src/Event_Logger/logger.vhd
View file @
6732a77f
...
...
@@ -79,7 +79,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
WORK
.
CANconstants
.
ALL
;
entity
CAN_logger
is
...
...
src/ID_transfer.vhd
View file @
6732a77f
...
...
@@ -47,7 +47,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
package
ID_transfer
is
...
...
src/Interrupts/intManager.vhd
View file @
6732a77f
...
...
@@ -58,7 +58,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
WORK
.
CANconstants
.
ALL
;
entity
intManager
is
...
...
src/Libraries/CANcomponents.vhd
View file @
6732a77f
...
...
@@ -52,7 +52,6 @@
library
ieee
;
use
IEEE
.
std_logic_1164
.
all
;
use
IEEE
.
numeric_std
.
all
;
use
ieee
.
std_logic_unsigned
.
all
;
use
WORK
.
CANconstants
.
all
;
package
CANcomponents
is
...
...
src/Registers_Memory_Interface/canfd_registers.vhd
View file @
6732a77f
...
...
@@ -107,7 +107,6 @@
Library
ieee
;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CAN_FD_register_map
.
all
;
...
...
test/feature/abort_transmittion_feature_tb.vhd
View file @
6732a77f
...
...
@@ -54,7 +54,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/arbitration_feature_tb.vhd
View file @
6732a77f
...
...
@@ -57,7 +57,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/fault_confinement_feature_tb.vhd
View file @
6732a77f
...
...
@@ -48,7 +48,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/feature_env.vhd
View file @
6732a77f
...
...
@@ -51,7 +51,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
@@ -286,7 +285,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/forbid_fd_feature_tb.vhd
View file @
6732a77f
...
...
@@ -46,7 +46,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/int_feature_tb.vhd
View file @
6732a77f
...
...
@@ -55,7 +55,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/invalid_configs_feature_tb.vhd
View file @
6732a77f
...
...
@@ -47,7 +47,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/overload_feature_tb.vhd
View file @
6732a77f
...
...
@@ -48,7 +48,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/retr_limit_feature_tb.vhd
View file @
6732a77f
...
...
@@ -46,7 +46,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/rtr_pref_feature.vhd
View file @
6732a77f
...
...
@@ -55,7 +55,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/rx_status_feature_tb.vhd
View file @
6732a77f
...
...
@@ -55,7 +55,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/soft_reset_feature_tb.vhd
View file @
6732a77f
...
...
@@ -56,7 +56,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/spec_mode_feature_tb.vhd
View file @
6732a77f
...
...
@@ -55,7 +55,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/traf_meas_feature_tb.vhd
View file @
6732a77f
...
...
@@ -55,7 +55,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/tran_delay_feature.vhd
View file @
6732a77f
...
...
@@ -56,7 +56,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/feature/tx_arb_time_tran.vhd
View file @
6732a77f
...
...
@@ -70,7 +70,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
USE
work
.
randomLib
.
All
;
...
...
test/lib/CANtestLib.vhd
View file @
6732a77f
...
...
@@ -52,7 +52,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
work
.
randomLib
.
All
;
use
work
.
CANconstants
.
all
;
...
...
@@ -1208,7 +1207,7 @@ procedure process_error
decode_dlc_v
(
frame
.
dlc
,
length
);
for
i
in
0
to
(
length
-1
)
/
4
loop
w_data
:
=
frame
.
data
(
511
-
i
*
32
downto
480
-
i
*
32
);
CAN_write
(
w_data
,
TX_DATA_5_ADR
+
i
,
ID
,
mem_bus
);
CAN_write
(
w_data
,
std_logic_vector
(
unsigned
(
TX_DATA_5_ADR
)
+
i
)
,
ID
,
mem_bus
);
end
loop
;
--Signal that the frame is valid by allowing the buffer
...
...
@@ -1426,7 +1425,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
work
.
randomLib
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
...
...
@@ -1484,4 +1482,4 @@ entity CAN_test_wrapper is
signal
status
:
out
test_status_type
);
end
entity
;
\ No newline at end of file
end
entity
;
test/lib/randomLib.vhd
View file @
6732a77f
...
...
@@ -48,7 +48,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
package
randomLib
is
...
...
@@ -1067,4 +1066,4 @@ package body randomLib is
end
package
body
;
\ No newline at end of file
end
package
body
;
test/others/busSync_tb_edge.vhd
View file @
6732a77f
...
...
@@ -47,7 +47,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANcomponents
.
ALL
;
USE
WORK
.
CANconstants
.
ALL
;
...
...
test/others/busSync_tb_sample.vhd
View file @
6732a77f
...
...
@@ -53,7 +53,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
USE
WORK
.
CANconstants
.
ALL
;
use
work
.
CANcomponents
.
ALL
;
...
...
test/others/core_top_tb1.vhd
View file @
6732a77f
...
...
@@ -59,7 +59,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANcomponents
.
ALL
;
use
work
.
CANconstants
.
all
;
use
work
.
CAN_FD_frame_format
.
all
;
...
...
test/others/prescaler_v3_tb.vhd
View file @
6732a77f
...
...
@@ -43,7 +43,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANcomponents
.
ALL
;
USE
WORK
.
CANconstants
.
ALL
;
...
...
test/others/registers_tb.vhd
View file @
6732a77f
...
...
@@ -42,7 +42,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
entity
registers_tb
is
...
...
@@ -265,7 +264,7 @@ begin
wait
for
17
ns
;
res_n
<=
not
ACT_reset
;
adress
<=
TO_STDLOGICVECTOR
(
X"410000"
)
;
adress
<=
X"410000"
;
scs
<=
'1'
;
srd
<=
'1'
;
wait
for
20
ns
;
...
...
test/others/timeStampGen_Tb.vhd
View file @
6732a77f
...
...
@@ -42,7 +42,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
entity
timeStampGen_Tb
is
end
entity
;
...
...
test/sanity/sanity_test.vhd
View file @
6732a77f
...
...
@@ -54,7 +54,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/Bit_Stuffing/Bit_Stuffing_tb.vhd
View file @
6732a77f
...
...
@@ -54,7 +54,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/Bus_Sampling/Bus_Sync_tb.vhd
View file @
6732a77f
...
...
@@ -46,7 +46,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/CRC/CRC_tb.vhd
View file @
6732a77f
...
...
@@ -57,7 +57,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/Evnt_Logger/Event_logger_tb.vhd
View file @
6732a77f
...
...
@@ -50,7 +50,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/Int_Manager/Int_Manager_tb.vhd
View file @
6732a77f
...
...
@@ -49,7 +49,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/Message_filter/message_filter_tb.vhd
View file @
6732a77f
...
...
@@ -49,7 +49,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/Prescaler/Prescaler_tb.vhd
View file @
6732a77f
...
...
@@ -50,7 +50,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/Protocol_Control/Protocol_Control_tb.vhd
View file @
6732a77f
...
...
@@ -104,7 +104,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/RX_Buffer/RX_Buffer_model.vhd
View file @
6732a77f
...
...
@@ -49,7 +49,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
USE
work
.
CANtestLib
.
All
;
use
work
.
CANcomponents
.
ALL
;
...
...
test/unit/RX_Buffer/RX_Buffer_tb.vhd
View file @
6732a77f
...
...
@@ -64,7 +64,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/TX_Arbitrator/TX_Arbitrator_tb.vhd
View file @
6732a77f
...
...
@@ -49,7 +49,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
test/unit/TX_Buffer/Tx_Buffer_tb.vhd
View file @
6732a77f
...
...
@@ -49,7 +49,6 @@ Library ieee;
USE
IEEE
.
std_logic_1164
.
all
;
USE
IEEE
.
numeric_std
.
ALL
;
USE
ieee
.
math_real
.
ALL
;
USE
ieee
.
std_logic_unsigned
.
All
;
use
work
.
CANconstants
.
all
;
use
work
.
CANcomponents
.
ALL
;
USE
work
.
CANtestLib
.
All
;
...
...
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