Added transition from Ready to Aborted as source of TXT HW CMD

interrupt.

src/Buffers_Message_Handling/txtBuffer.vhd

@@ -185,7 +185,10 @@ begin
     txt_hw_cmd_int <= hw_cbs and (txt_hw_cmd.failed = '1' or
                                   txt_hw_cmd.valid = '1' or
                                   (txt_hw_cmd.unlock = '1' and
-                                   buf_fsm = txt_ab_prog));
+                                   buf_fsm = txt_ab_prog) or
+                                  (txt_sw_cmd.set_abt = '1' and
+                                   sw_cbs = '1' and
+                                   buf_fsm = txt_ready));
     
     -- Connect internal buffer state to output
     txtb_state <= buf_fsm;

test/unit/Int_Manager/Int_Manager_tb.vhd

@@ -196,7 +196,7 @@ architecture int_man_unit_test of CAN_test is
 
         -- TXT HW Command
         signal txt_hw_cmd_int         :inout   std_logic_vector(TXT_BUFFER_COUNT - 1
-                                                                downto 0);
+                                                                downto 0)
     )is
         variable tmp                  :        std_logic;
     begin