test: ERR_CAPT[ERR_POS] = SOF feature test.

test/feature/err_capt_sof_feature_tb.vhd

+--------------------------------------------------------------------------------
+-- 
+-- CTU CAN FD IP Core
+-- Copyright (C) 2015-2018
+-- 
+-- Authors:
+--     Ondrej Ille <ondrej.ille@gmail.com>
+--     Martin Jerabek <martin.jerabek01@gmail.com>
+-- 
+-- Project advisors: 
+-- 	Jiri Novak <jnovak@fel.cvut.cz>
+-- 	Pavel Pisa <pisa@cmp.felk.cvut.cz>
+-- 
+-- Department of Measurement         (http://meas.fel.cvut.cz/)
+-- Faculty of Electrical Engineering (http://www.fel.cvut.cz)
+-- Czech Technical University        (http://www.cvut.cz/)
+-- 
+-- Permission is hereby granted, free of charge, to any person obtaining a copy
+-- of this VHDL component and associated documentation files (the "Component"),
+-- to deal in the Component without restriction, including without limitation
+-- the rights to use, copy, modify, merge, publish, distribute, sublicense,
+-- and/or sell copies of the Component, and to permit persons to whom the
+-- Component is furnished to do so, subject to the following conditions:
+-- 
+-- The above copyright notice and this permission notice shall be included in
+-- all copies or substantial portions of the Component.
+-- 
+-- THE COMPONENT IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+-- AUTHORS OR COPYRIGHTHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+-- FROM, OUT OF OR IN CONNECTION WITH THE COMPONENT OR THE USE OR OTHER DEALINGS
+-- IN THE COMPONENT.
+-- 
+-- The CAN protocol is developed by Robert Bosch GmbH and protected by patents.
+-- Anybody who wants to implement this IP core on silicon has to obtain a CAN
+-- protocol license from Bosch.
+-- 
+--------------------------------------------------------------------------------
+
+--------------------------------------------------------------------------------
+-- Purpose:
+--  ERR_CAPT[ERR_POS] = ERC_POS_SOF feature test. 
+--
+-- Verifies:
+--  1. Detection of form error in SOF bit.
+--
+-- Test sequence:
+--  1. Generate CAN frame and send it by Node 1. Wait until transmission starts
+--     and force bus Recessive. Wait until sample point and check that Error
+--     frame is transmitted. Check that ERR_CAPT says that Form Error during
+--     SOF was detected!
+--------------------------------------------------------------------------------
+-- Revision History:
+--    02.02.2020   Created file
+--------------------------------------------------------------------------------
+
+context work.ctu_can_synth_context;
+context work.ctu_can_test_context;
+
+use lib.pkg_feature_exec_dispath.all;
+
+package err_capt_sof_feature is
+    procedure err_capt_sof_feature_exec(
+        signal      so              : out    feature_signal_outputs_t;
+        signal      rand_ctr        : inout  natural range 0 to RAND_POOL_SIZE;
+        signal      iout            : in     instance_outputs_arr_t;
+        signal      mem_bus         : inout  mem_bus_arr_t;
+        signal      bus_level       : in     std_logic
+    );
+end package;
+
+
+package body err_capt_sof_feature is
+    procedure err_capt_sof_feature_exec(
+        signal      so              : out    feature_signal_outputs_t;
+        signal      rand_ctr        : inout  natural range 0 to RAND_POOL_SIZE;
+        signal      iout            : in     instance_outputs_arr_t;
+        signal      mem_bus         : inout  mem_bus_arr_t;
+        signal      bus_level       : in     std_logic
+    ) is
+        variable rand_value         :       real;
+        variable alc                :       natural;
+
+        -- Some unit lost the arbitration...
+        -- 0 - initial , 1-Node 1 turned rec, 2 - Node 2 turned rec
+        variable unit_rec           :     natural := 0;
+
+        variable ID_1               :     natural := 1;
+        variable ID_2               :     natural := 2;
+        variable r_data             :     std_logic_vector(31 downto 0) :=
+                                               (OTHERS => '0');
+        -- Generated frames
+        variable frame_1            :     SW_CAN_frame_type;
+        variable frame_2            :     SW_CAN_frame_type;
+        variable frame_rx           :     SW_CAN_frame_type;
+
+        -- Node status
+        variable stat_1             :     SW_status;
+        variable stat_2             :     SW_status;
+
+        variable pc_dbg             :     SW_PC_Debug;
+        
+        variable txt_buf_state      :     SW_TXT_Buffer_state_type;
+        variable rx_buf_info        :     SW_RX_Buffer_info;
+        variable frames_equal       :     boolean := false;        
+
+        variable id_vect            :     std_logic_vector(28 downto 0);
+        variable wait_time          :     natural;
+        
+        variable err_counters_1_1   :     SW_error_counters;
+        variable err_counters_1_2   :     SW_error_counters;
+
+        variable err_counters_2_1   :     SW_error_counters;
+        variable err_counters_2_2   :     SW_error_counters;
+        
+        variable frame_sent         :     boolean;
+        
+        variable err_capt           :     SW_error_capture;
+
+    begin
+
+        -----------------------------------------------------------------------
+        -- 1. Generate CAN frame and send it by Node 1. Wait until transmission
+        --    starts and force bus Recessive. Wait until sample point and check
+        --    that Error frame is transmitted. Check that ERR_CAPT says that
+        --    Form Error during SOF was detected!
+        -----------------------------------------------------------------------
+        info("Step 1");
+
+        CAN_generate_frame(rand_ctr, frame_1);
+        CAN_send_frame(frame_1, 1, ID_1, mem_bus(1), frame_sent);
+        CAN_wait_tx_rx_start(true, false, ID_1, mem_bus(1));
+
+        force_bus_level(RECESSIVE, so.bl_force, so.bl_inject);
+        CAN_wait_sample_point(iout(1).stat_bus, false);
+        wait for 20 ns; -- To be sure that opposite bit is sampled!
+        release_bus_level(so.bl_force);
+        
+        CAN_read_error_code_capture(err_capt, ID_1, mem_bus(1));
+        check(err_capt.err_type = can_err_form, "Form error detected!");
+        check(err_capt.err_pos = err_pos_sof, "Error detected in SOF!");
+        
+        CAN_wait_bus_idle(ID_1, mem_bus(1));
+
+        wait for 100 ns;
+
+  end procedure;
+
+end package body;

test/tests_fast.yml

@@ -60,6 +60,7 @@ feature:
         command_frcrst:
         device_id:
         dlc_can20_8_64_bytes:
+        err_capt_sof:
         err_norm_fd:
         error_rules_a:
         error_rules_b:

test/tests_nightly.yml

@@ -91,6 +91,7 @@ feature:
         command_frcrst:
         device_id:
         dlc_can20_8_64_bytes:
+        err_capt_sof:
         err_norm_fd:
             iterations: 5
         error_rules_a:

test/wave_files/feature_err_capt_sof.gtkw

+[*]
+[*] GTKWave Analyzer v3.3.98 (w)1999-2019 BSI
+[*] Thu Jan  2 18:32:03 2020
+[*]
+[dumpfile] "/build/test/build/vunit_out/test_output/lib.tb_feature.err_capt_sof_284efd78b8ceccd5c281a9a4579b7829b1e15644/ghdl/wave.ghw"
+[dumpfile_mtime] "Thu Jan  2 18:29:52 2020"
+[dumpfile_size] 2110746
+[savefile] "/build/test/wave_files/feature_err_capt_sof.gtkw"
+[timestart] 19692000000
+[size] 1853 1025
+[pos] -1 -1
+*-29.000000 21290000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[treeopen] top.
+[treeopen] top.tb_feature.
+[treeopen] top.tb_feature.test_comp.
+[treeopen] top.tb_feature.test_comp.g_inst[1].
+[treeopen] top.tb_feature.test_comp.g_inst[1].can_inst.
+[treeopen] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.
+[treeopen] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.
+[treeopen] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.
+[sst_width] 399
+[signals_width] 262
+[sst_expanded] 1
+[sst_vpaned_height] 300
+@28
+top.tb_feature.test_comp.g_inst[1].can_inst.can_tx
+top.tb_feature.test_comp.g_inst[1].can_inst.can_rx
+@420
+top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.protocol_control_fsm_inst.curr_state
+@28
+top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.protocol_control_fsm_inst.err_frm_req
+top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.protocol_control_fsm_inst.is_sof
+@22
+#{top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.erc_capture[7:0]} top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.erc_capture[7] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.erc_capture[6] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.erc_capture[5] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.erc_capture[4] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.erc_capture[3] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.erc_capture[2] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.erc_capture[1] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.erc_capture[0]
+@28
+#{top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_type_q[2:0]} top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_type_q[2] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_type_q[1] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_type_q[0]
+@29
+top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_frm_req_i
+@22
+#{top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_pos_q[4:0]} top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_pos_q[4] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_pos_q[3] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_pos_q[2] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_pos_q[1] top.tb_feature.test_comp.g_inst[1].can_inst.can_core_inst.protocol_control_inst.err_detector_inst.err_pos_q[0]
+[pattern_trace] 1
+[pattern_trace] 0