Commit 46e1ebb7 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

Merge remote-tracking branch 'origin/master' into 207-design-decoupling

parents 66c790ed 69cd69b9
[submodule "scripts/pyXact_generator/ipyxact_parser"]
path = scripts/pyXact_generator/ipyxact_parser
url = https://github.com/oille/ipyxact.git
[submodule "pyXact_generator"]
path = scripts/pyXact_generator
url = https://github.com/Blebowski/Reg_Map_Gen
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......@@ -533,7 +533,7 @@ Ille Ondrej, Martin Jeřábek
\noindent
\align center
\begin_inset Tabular
<lyxtabular version="3" rows="5" columns="4">
<lyxtabular version="3" rows="6" columns="4">
<features tabularvalignment="middle">
<column alignment="center" valignment="top" width="1.5cm">
<column alignment="center" valignment="top" width="2cm">
......@@ -696,7 +696,7 @@ Updated register map description, external references to generated maps.
</cell>
</row>
<row>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
......@@ -705,7 +705,7 @@ Updated register map description, external references to generated maps.
\end_inset
</cell>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
......@@ -714,7 +714,7 @@ Martin Jerabek
\end_inset
</cell>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
......@@ -723,13 +723,52 @@ Martin Jerabek
\end_inset
</cell>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" rightline="true" usebox="none">
<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
Added Linux driver description
\end_layout
\end_inset
</cell>
</row>
<row>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
2.1.1
\end_layout
\end_inset
</cell>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
Ondrej Ille
\end_layout
\end_inset
</cell>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
12-2018
\end_layout
\end_inset
</cell>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" rightline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
Added Register map block diagram after re-implementation of registers via
Register map generator.
\end_layout
\end_inset
</cell>
</row>
......@@ -1182,21 +1221,17 @@ doc/core/registerMap.lyx
).
\end_layout
\begin_layout Itemize
RTL Code of Control Registers module and Event Logger Registers module.
\end_layout
\begin_layout Standard
To generate these design materials CTU CAN FD IP Core contains its own IP-XACT
generator framework (located under
\begin_inset Quotes eld
\end_inset
scripts/pyXact_generator
\begin_inset Quotes erd
\end_inset
) which extends the implementation of
generator which can be found at
\begin_inset CommandInset href
LatexCommand href
name "olofk/ipyxact"
target "https://github.com/olofk/ipyxact"
name "regmap_gen"
target "https://github.com/Blebowski/Reg_Map_Gen"
literal "false"
\end_inset
......@@ -13110,6 +13145,13 @@ name "fig:TXT_Buffer-FSM"
\end_inset
\end_layout
\begin_layout Standard
\begin_inset Newpage pagebreak
\end_inset
\end_layout
\begin_layout Subsection
......@@ -13144,10 +13186,26 @@ canfd_registers
\begin_layout Standard
Memory Registers provide an interface between SoC Memory Bus (Avalon or
APB) and all control and Status signals of CTU CAN FD IP function.
Address decoder for access to TXT Buffers is implemented in this module.
Driving bus assignments are implemented in this module.
Register structure is in described in Chapter:
APB) and all control and status signals of CTU CAN FD IP function.
Memory registers consist of two separate modules: Control registers and
Event Loger Registers.
Each module is generated by Register map generator Tool which is further
described in
\begin_inset Flex URL
status open
\begin_layout Plain Layout
https://github.com/Blebowski/Reg_Map_Gen
\end_layout
\end_inset
.
Outputs of Register modules are connected to Driving Bus.
Inputs to Register modules (corresponding to read-only registers) are driven
from Status Bus.
Block diagram is shown in
\begin_inset ERT
status open
......@@ -13155,15 +13213,71 @@ status open
\backslash
hyperref[3.
CAN FD Core memory map]{3.
CAN FD Core memory map}
hyperref[fig:Memory_regs-block-diagram]{Figure }
\end_layout
\end_inset
\begin_inset CommandInset ref
LatexCommand ref
reference "fig:Memory_regs-block-diagram"
plural "false"
caps "false"
noprefix "false"
\end_inset
.
Frame Format in TXT Buffers and RX Buffer is described in Chapter:
\end_layout
\begin_layout Standard
\begin_inset Float figure
placement h
wide false
sideways false
status open
\begin_layout Plain Layout
\noindent
\align center
\begin_inset Graphics
filename ../pics/Visio_generated/Memory_regs_block_diagram.pdf
lyxscale 20
scale 70
\end_inset
\end_layout
\begin_layout Plain Layout
\begin_inset Caption Standard
\begin_layout Plain Layout
Memory registers block diagram
\begin_inset CommandInset label
LatexCommand label
name "fig:Memory_regs-block-diagram"
\end_inset
\end_layout
\end_inset
\end_layout
\end_inset
\end_layout
\begin_layout Standard
Register structure is in described in Chapter:
\begin_inset ERT
status open
......@@ -13171,14 +13285,14 @@ status open
\backslash
hyperref[4.
CAN FD frame format]{4.
CAN FD frame format}
hyperref[3.
CAN FD Core memory map]{3.
CAN FD Core memory map}
\end_layout
\end_inset
.
\end_layout
\begin_layout Standard
......@@ -20450,7 +20564,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
2 500
2640
\end_layout
\end_inset
......@@ -20459,7 +20573,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
1 569
1489
\end_layout
\end_inset
......@@ -20506,7 +20620,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
2 661
2741
\end_layout
\end_inset
......@@ -20515,7 +20629,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
1 714
1625
\end_layout
\end_inset
......@@ -20562,7 +20676,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
2 819
2834
\end_layout
\end_inset
......@@ -20571,7 +20685,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
1 867
1770
\end_layout
\end_inset
......@@ -20618,7 +20732,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
3 030
3106
\end_layout
\end_inset
......@@ -20627,7 +20741,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
1 942
1905
\end_layout
\end_inset
......@@ -20674,7 +20788,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
3 177
3157
\end_layout
\end_inset
......@@ -20683,7 +20797,7 @@ BRAMs
\begin_inset Text
\begin_layout Plain Layout
2 004
1908
\end_layout
\end_inset
......
......@@ -3895,7 +3895,7 @@ label{COMMAND
\end_inset
\end_layout
\begin_layout Description
Type: writeOnce
Type: write-only
\end_layout
\begin_layout Description
Address: 0x5
......@@ -4012,19 +4012,19 @@ Reserved\end_layout
\end_inset
</cell>
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
<cell alignment="center" leftline="true" multicolumn="1" topline="true" usebox="none" valignment="top">
\begin_inset Text
\begin_layout Plain Layout
Reserved\end_layout
TXFCRST\end_layout
\end_inset
</cell>
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
<cell alignment="center" leftline="true" multicolumn="1" topline="true" usebox="none" valignment="top">
\begin_inset Text
\begin_layout Plain Layout
Reserved\end_layout
RXFCRST\end_layout
\end_inset
</cell>
......@@ -4090,7 +4090,7 @@ Reset value\end_layout
\begin_inset Text
\begin_layout Plain Layout
-\end_layout
0\end_layout
\end_inset
</cell>
......@@ -4098,7 +4098,7 @@ Reset value\end_layout
\begin_inset Text
\begin_layout Plain Layout
-\end_layout
0\end_layout
\end_inset
</cell>
......@@ -4161,6 +4161,12 @@ CDO Clear data overrun flag. This command will clear data overrun flag on RX Buf
\begin_layout Description
ERCRST Error counter reset. Issuing this command will erase TX, RX error counters after 128 conecutive ocurrences of 11 recessive bits. This command can be used as protocol compliant transition from Bus-off to Error Active. Upon completion, TX RX Error counters are erased and fault confinement state is set to Error Active.
\end_layout
\begin_layout Description
RXFCRST Clear RX frames counter.
\end_layout
\begin_layout Description
TXFCRST Clear TX frames counter.
\end_layout
\begin_layout Standard
\begin_inset VSpace bigskip
\end_inset
......@@ -4761,7 +4767,7 @@ label{INT_STAT
\end_inset
\end_layout
\begin_layout Description
Type: read-write
Type: read-writeOnce
\end_layout
\begin_layout Description
Address: 0x8
......@@ -5309,7 +5315,7 @@ label{INT_ENA_SET
\end_inset
\end_layout
\begin_layout Description
Type: read-write
Type: read-writeOnce
\end_layout
\begin_layout Description
Address: 0xC
......@@ -6339,7 +6345,7 @@ label{INT_MASK_SET
\end_inset
\end_layout
\begin_layout Description
Type: read-write
Type: read-writeOnce
\end_layout
\begin_layout Description
Address: 0x14
......@@ -25437,7 +25443,7 @@ Address: 0x64
Size: 4 bytes
\end_layout
\begin_layout Standard
Read data word from RX Buffer.
\end_layout
\begin_layout Standard
\noindent
......@@ -29102,7 +29108,7 @@ label{RX_COUNTER
\end_inset
\end_layout
\begin_layout Description
Type: read-write
Type: read-only
\end_layout
\begin_layout Description
Address: 0x7C
......@@ -30103,7 +30109,7 @@ label{TX_COUNTER
\end_inset
\end_layout
\begin_layout Description
Type: read-write
Type: read-only
\end_layout
\begin_layout Description
Address: 0x80
......@@ -35018,7 +35024,7 @@ label{LOG_TRIG_CONFIG
\end_inset
\end_layout
\begin_layout Description
Type:
Type: read-write
\end_layout
\begin_layout Description
Address: 0x500
......@@ -36070,7 +36076,7 @@ label{LOG_CAPT_CONFIG
\end_inset
\end_layout
\begin_layout Description
Type:
Type: read-write
\end_layout
\begin_layout Description
Address: 0x504
......@@ -37131,7 +37137,7 @@ label{LOG_STATUS
\end_inset
\end_layout
\begin_layout Description
Type:
Type: read-only
\end_layout
\begin_layout Description
Address: 0x508
......@@ -37658,7 +37664,7 @@ label{LOG_POINTERS
\end_inset
\end_layout
\begin_layout Description
Type:
Type: read-only
\end_layout
\begin_layout Description
Address: 0x50A
......@@ -38176,7 +38182,7 @@ label{LOG_COMMAND
\end_inset
\end_layout
\begin_layout Description
Type:
Type: write-only
\end_layout
\begin_layout Description
Address: 0x50C
......@@ -38457,7 +38463,7 @@ label{LOG_CAPT_EVENT_1
\end_inset
\end_layout
\begin_layout Description
Type:
Type: read-only
\end_layout
\begin_layout Description
Address: 0x510
......@@ -39458,7 +39464,7 @@ label{LOG_CAPT_EVENT_2
\end_inset
\end_layout
\begin_layout Description
Type:
Type: read-only
\end_layout
\begin_layout Description
Address: 0x514
......
......@@ -33,11 +33,11 @@
/* This file is autogenerated, DO NOT EDIT! */
#ifndef __CTU_CAN_FD_FRAME__
#define __CTU_CAN_FD_FRAME__
#ifndef __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__
#define __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__
/* Frame_format memory map */
enum ctu_can_fd_frame_format {
/* CAN_Frame_format memory map */
enum ctu_can_fd_can_frame_format {
CTU_CAN_FD_FRAME_FORM_W = 0x0,
CTU_CAN_FD_IDENTIFIER_W = 0x4,
CTU_CAN_FD_TIMESTAMP_L_W = 0x8,
......
......@@ -41,36 +41,36 @@
//#include "ctu_can_fd_regs.h"
#include "ctu_can_fd_hw.h"
void ctu_can_fd_write32(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg,
void ctu_can_fd_write32(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg,
u32 val)
{
iowrite32(val, (char *)priv->mem_base + reg);
}
void ctu_can_fd_write32_be(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg,
void ctu_can_fd_write32_be(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg,
u32 val)
{
iowrite32(val, (char *)priv->mem_base + reg);
}
u32 ctu_can_fd_read32(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg)
u32 ctu_can_fd_read32(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg)
{
return ioread32((const char *)priv->mem_base + reg);
}
u32 ctu_can_fd_read32_be(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg)
u32 ctu_can_fd_read32_be(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg)
{
return ioread32be((const char *)priv->mem_base + reg);
}
/*
void ctu_can_fd_write16(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg,
void ctu_can_fd_write16(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg,
u16 val)
{
iowrite16(val, (char *)priv->mem_base + reg);
}
void ctu_can_fd_write8(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg,
void ctu_can_fd_write8(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg,
u8 val)
{
iowrite8(val, (char *)priv->mem_base + reg);
......@@ -78,19 +78,19 @@ void ctu_can_fd_write8(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg,
*/
/*
u16 ctu_can_fd_read16(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg)
u16 ctu_can_fd_read16(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg)
{
return ioread16((const char *)priv->mem_base + reg);
}
u8 ctu_can_fd_read8(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg)
u8 ctu_can_fd_read8(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg)
{
return ioread8((const char *)priv->mem_base + reg);
}
*/
static void ctu_can_fd_write_txt_buf(struct ctucanfd_priv *priv,
enum ctu_can_fd_regs buf_base,
enum ctu_can_fd_can_registers buf_base,
u32 offset, u32 val)
{
priv->write_reg(priv, buf_base + offset, val);
......@@ -288,8 +288,8 @@ void ctu_can_fd_abort_tx(struct ctucanfd_priv *priv)
// TODO: rather than set(value, mask) interface, provide native set(val), clr(val)
// interface to potentially avoid unnecessary write
static void ctu_can_fd_int_conf(struct ctucanfd_priv *priv, enum ctu_can_fd_regs sreg,
enum ctu_can_fd_regs creg,
static void ctu_can_fd_int_conf(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers sreg,
enum ctu_can_fd_can_registers creg,
union ctu_can_fd_int_stat mask,
union ctu_can_fd_int_stat val)
{
......@@ -509,7 +509,7 @@ bool ctu_can_fd_set_mask_filter(struct ctucanfd_priv *priv, u8 fnum, bool enable
const struct can_filter *filter)
{
union ctu_can_fd_filter_control_filter_status creg;
enum ctu_can_fd_regs maddr,vaddr;
enum ctu_can_fd_can_registers maddr,vaddr;
union ctu_can_fd_identifier_w hwid_mask;
union ctu_can_fd_identifier_w hwid_val;
uint8_t val = 0;
......@@ -719,7 +719,7 @@ void ctu_can_fd_set_txt_priority(struct ctucanfd_priv *priv, const u8 *prio)
priv->write_reg(priv, CTU_CAN_FD_TX_PRIORITY, reg.u32);
}
static const enum ctu_can_fd_regs tx_buf_bases[CTU_CAN_FD_TXT_BUFFER_COUNT] = {
static const enum ctu_can_fd_can_registers tx_buf_bases[CTU_CAN_FD_TXT_BUFFER_COUNT] = {
CTU_CAN_FD_TXTB1_DATA_1, CTU_CAN_FD_TXTB2_DATA_1,
CTU_CAN_FD_TXTB3_DATA_1, CTU_CAN_FD_TXTB4_DATA_1
};
......@@ -727,7 +727,7 @@ static const enum ctu_can_fd_regs tx_buf_bases[CTU_CAN_FD_TXT_BUFFER_COUNT] = {
bool ctu_can_fd_insert_frame(struct ctucanfd_priv *priv, const struct canfd_frame *cf, u64 ts,
u8 buf, bool isfdf)
{
enum ctu_can_fd_regs buf_base;
enum ctu_can_fd_can_registers buf_base;
union ctu_can_fd_frame_form_w ffw;
union ctu_can_fd_identifier_w idw;
u8 dlc;
......
......@@ -140,17 +140,17 @@ struct ctucanfd_priv;
#ifndef ctucanfd_priv
struct ctucanfd_priv {
void __iomem *mem_base;
u32 (*read_reg)(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg);
void (*write_reg)(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg, u32 val);
u32 (*read_reg)(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg);
void (*write_reg)(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg, u32 val);
};
#endif
void ctu_can_fd_write32(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg,
void ctu_can_fd_write32(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg,
u32 val);
void ctu_can_fd_write32_be(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg,
void ctu_can_fd_write32_be(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg,
u32 val);
u32 ctu_can_fd_read32(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg);
u32 ctu_can_fd_read32_be(struct ctucanfd_priv *priv, enum ctu_can_fd_regs reg);
u32 ctu_can_fd_read32(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg);
u32 ctu_can_fd_read32_be(struct ctucanfd_priv *priv, enum ctu_can_fd_can_registers reg);
/*
......
......@@ -33,11 +33,11 @@
/* This file is autogenerated, DO NOT EDIT! */
#ifndef __CTU_CAN_FD_REGS__
#define __CTU_CAN_FD_REGS__