Commit 381d95c6 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

Merge branch '205-ssp-offset-feature-test' into 'master'

Resolve "SSP offset feature test"

Closes #205

See merge request !312
parents 08960454 e00f13f5
Pipeline #14693 failed with stages
in 73 minutes and 45 seconds
......@@ -106,6 +106,7 @@ package body btr_fd_feature is
variable clock_meas : natural := 0;
variable frames_equal : boolean;
variable ssp_pos : std_logic_vector(7 downto 0);
begin
-----------------------------------------------------------------------
......@@ -182,6 +183,11 @@ package body btr_fd_feature is
CAN_configure_timing(bus_timing, ID_1, mem_bus(1));
CAN_configure_timing(bus_timing, ID_2, mem_bus(2));
-- Configure SSP so that it samples in Data-bit rate and in 50 % of
-- expected received bit! We need it only for Node 1!
ssp_pos := std_logic_vector(to_unsigned(clock_per_bit/2, 8));
CAN_configure_ssp(ssp_meas_n_offset, ssp_pos, ID_1, mem_bus(1));
-----------------------------------------------------------------------
-- 2. Enable both Nodes and send CAN FD frame where bit-rate is shifted
-- by Node 1. Wait until data field in Node 1 and measure duration
......
......@@ -51,9 +51,9 @@
-- Test sequence:
-- 1. Set Node 2 to ACK forbidden mode. Generate CAN frame and send it by Node
-- 1. Wait until Error frame is sent by Node 2. Wait for random amount of
-- bits (0-5) and force bus level to recessive for duration of one bit time.
-- Wait until bus is idle and check that RX Error counter was incremented
-- by 9 (first form error in EOF, next bit error during Error frame)!
-- bits (0-5) and force bus level to recessive. Wait until sample point and
-- check that RX Error counter was incremented by 9 (first form error in EOF,
-- next bit error during Error frame)! Wait until bus is idle!
-- 2. Unset ACK Forbidden in Node 2. Generate CAN frame and send it by Node 1.
-- Wait until Intermission in Node 2 and force bus low for duration of one
-- bit time (overload condition). Check that overload frame is being tran-
......@@ -118,10 +118,10 @@ package body error_rules_e_feature is
-----------------------------------------------------------------------
-- 1. Set Node 2 to ACK forbidden mode. Generate CAN frame and send it
-- by Node 1. Wait until Error frame is sent by Node 2. Wait for
-- random amount of bits (0-5) and force bus level to recessive for
-- duration of one bit time. Wait until bus is idle and check that
-- RX Error counter was incremented by 9 (first form Error in EOF,
-- next bit error during Overload frame)!
-- random amount of bits (0-5) and force bus level to recessive.
-- Wait until sample point and check that RX Error counter was
-- incremented by 9 (first form error in EOF, next bit error during
-- Error frame)! Wait until bus is idle!
-----------------------------------------------------------------------
info("Step 1");
......@@ -137,6 +137,7 @@ package body error_rules_e_feature is
CAN_wait_error_frame(ID_2, mem_bus(2));
rand_int_v(rand_ctr, 5, bit_waits);
info ("Waiting for " & integer'image(bit_waits) & " bits!");
for i in 0 to bit_waits - 1 loop
CAN_wait_sample_point(iout(2).stat_bus);
end loop;
......@@ -147,9 +148,6 @@ package body error_rules_e_feature is
wait for 20 ns;
release_bus_level(so.bl_force);
CAN_wait_bus_idle(ID_1, mem_bus(1));
CAN_wait_bus_idle(ID_2, mem_bus(2));
read_error_counters(err_counters_2, ID_2, mem_bus(2));
check(err_counters_2.rx_counter = err_counters_1.rx_counter + 9,
......@@ -158,6 +156,9 @@ package body error_rules_e_feature is
check(err_counters_2.tx_counter = err_counters_1.tx_counter,
"TX Error counter unchanged in receiver!");
CAN_wait_bus_idle(ID_1, mem_bus(1));
CAN_wait_bus_idle(ID_2, mem_bus(2));
-----------------------------------------------------------------------
-- 2. Unset ACK Forbidden in Node 2. Generate CAN frame and send it by
-- Node 1. Wait until Intermission in Node 2 and force bus low for
......
......@@ -128,6 +128,10 @@ package body rx_settings_rtsop_feature is
rand_logic_vect_v(rand_ctr, rand_ts, 0.5);
-- Keep highest bit 0 to avoid complete overflow during the test!
rand_ts(63) := '0';
-- Timestamp is realized as two 32 bit naturals! Due to this, we can't
-- have 1 in MSB to avoid overflow.
rand_ts(31) := '0';
ftr_tb_set_timestamp(rand_ts, ID_1, so.ts_preset, so.ts_preset_val);
info("Forcing start timestamp in Node 1 to: " & to_hstring(rand_ts));
......
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