Commit 3592339e authored by Martin Jeřábek's avatar Martin Jeřábek

driver: propagate bittiming adjustments back to caller

parent e7ca61e4
......@@ -353,26 +353,26 @@ const struct can_bittiming_const ctu_can_fd_bit_timing_data_max = {
};
void ctu_can_fd_set_nom_bittiming(struct ctucanfd_priv *priv,
const struct can_bittiming *nbt)
struct can_bittiming *nbt)
{
union ctu_can_fd_btr btr;
/*
* The timing calculation functions have only constraints on tseg1,
* which is prop_seg + phase1_seg combined. tseg1 is then split in half
* and stored into prog_seg and phase_seg1. In CTU CAN FD, PROP is 7 bits
* wide but PH1 only 6, so we must re-distribute the values here.
* TODO: get the fixed values to the kernel, so that they are displayed
* accurately
*/
u32 prop_seg = nbt->prop_seg;
u32 phase_seg1 = nbt->phase_seg1;
if (phase_seg1 > 63) {
prop_seg += phase_seg1 - 63;
phase_seg1 = 63;
}
btr.u32 = 0;
/*
* The timing calculation functions have only constraints on tseg1,
* which is prop_seg + phase1_seg combined. tseg1 is then split in half
* and stored into prog_seg and phase_seg1. In CTU CAN FD, PROP is 7 bits
* wide but PH1 only 6, so we must re-distribute the values here.
*/
u32 prop_seg = nbt->prop_seg;
u32 phase_seg1 = nbt->phase_seg1;
if (phase_seg1 > 63) {
prop_seg += phase_seg1 - 63;
phase_seg1 = 63;
nbt->prop_seg = prop_seg;
nbt->phase_seg1 = phase_seg1;
}
btr.u32 = 0;
btr.s.prop = prop_seg;
btr.s.ph1 = phase_seg1;
btr.s.ph2 = nbt->phase_seg2;
......@@ -383,24 +383,24 @@ void ctu_can_fd_set_nom_bittiming(struct ctucanfd_priv *priv,
}
void ctu_can_fd_set_data_bittiming(struct ctucanfd_priv *priv,
const struct can_bittiming *dbt)
struct can_bittiming *dbt)
{
union ctu_can_fd_btr_fd btr_fd;
/*
* The timing calculation functions have only constraints on tseg1,
* which is prop_seg + phase1_seg combined. tseg1 is then split in half
* and stored into prog_seg and phase_seg1. In CTU CAN FD, PROP_FD is 6 bits
* wide but PH1_FD only 5, so we must re-distribute the values here.
* TODO: get the fixed values to the kernel, so that they are displayed
* accurately
*/
u32 prop_seg = dbt->prop_seg;
u32 phase_seg1 = dbt->phase_seg1;
if (phase_seg1 > 31) {
prop_seg += phase_seg1 - 31;
phase_seg1 = 31;
}
/*
* The timing calculation functions have only constraints on tseg1,
* which is prop_seg + phase1_seg combined. tseg1 is then split in half
* and stored into prog_seg and phase_seg1. In CTU CAN FD, PROP_FD is 6 bits
* wide but PH1_FD only 5, so we must re-distribute the values here.
*/
u32 prop_seg = dbt->prop_seg;
u32 phase_seg1 = dbt->phase_seg1;
if (phase_seg1 > 31) {
prop_seg += phase_seg1 - 31;
phase_seg1 = 31;
dbt->prop_seg = prop_seg;
dbt->phase_seg1 = phase_seg1;
}
btr_fd.u32 = 0;
btr_fd.s.prop_fd = prop_seg;
......
......@@ -356,22 +356,26 @@ void ctu_can_fd_set_mode(struct ctucanfd_priv *priv, const struct can_ctrlmode *
/*
* Set Nominal bit timing of CTU CAN FD Core.
*
* NOTE: phase_seg1 and prop_seg may be modified if phase_seg1 > 63
* This is because in Linux, the constraints are only on phase_seg1+prop_seg.
*
* Arguments:
* priv Private info
* nbt Nominal bit timing settings of CAN Controller.
*/
void ctu_can_fd_set_nom_bittiming(struct ctucanfd_priv *priv, const struct can_bittiming *nbt);
void ctu_can_fd_set_nom_bittiming(struct ctucanfd_priv *priv, struct can_bittiming *nbt);
/*
* Set Data bit timing of CTU CAN FD Core.
*
* NOTE: phase_seg1 and prop_seg may be modified if phase_seg1 > 63
* This is because in Linux, the constraints are only on phase_seg1+prop_seg.
*
* Arguments:
* priv Private info
* nbt Data bit timing settings of CAN Controller.
*/
void ctu_can_fd_set_data_bittiming(struct ctucanfd_priv *priv, const struct can_bittiming *dbt);
void ctu_can_fd_set_data_bittiming(struct ctucanfd_priv *priv, struct can_bittiming *dbt);
/*
......
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