Commit 2c9e0c07 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

Rewritten expression with explicit comparator on HW CBS

parent d80f1ffb
Pipeline #1960 passed with stages
in 5 minutes and 44 seconds
......@@ -182,18 +182,15 @@ begin
-- TXT Buffer HW Command generates interrupt upon transition to
-- Failed, Done and Aborted states!
txt_hw_cmd_int <= hw_cbs and ((txt_hw_cmd.failed = '1')
or
(txt_hw_cmd.valid = '1')
or
((txt_hw_cmd.unlock = '1') and
(buf_fsm = txt_ab_prog))
or
((txt_sw_cmd.set_abt = '1')
and
(sw_cbs = '1')
and
(buf_fsm = txt_ready)));
txt_hw_cmd_int <= '1' when (hw_cbs = '1') and ((txt_hw_cmd.failed = '1') or
(txt_hw_cmd.valid = '1') or
((txt_hw_cmd.unlock = '1') and
(buf_fsm = txt_ab_prog)) or
((txt_sw_cmd.set_abt = '1') and
(sw_cbs = '1') and
(buf_fsm = txt_ready)))
else
'0';
-- Connect internal buffer state to output
txtb_state <= buf_fsm;
......
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