Commit 277dd4fd authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

Modified documentation, added CRC wrapper.

parent eb113f9f
...@@ -533,7 +533,7 @@ Ille Ondrej, Martin Jeřábek ...@@ -533,7 +533,7 @@ Ille Ondrej, Martin Jeřábek
\noindent \noindent
\align center \align center
\begin_inset Tabular \begin_inset Tabular
<lyxtabular version="3" rows="6" columns="4"> <lyxtabular version="3" rows="7" columns="4">
<features tabularvalignment="middle"> <features tabularvalignment="middle">
<column alignment="center" valignment="top" width="1.5cm"> <column alignment="center" valignment="top" width="1.5cm">
<column alignment="center" valignment="top" width="2cm"> <column alignment="center" valignment="top" width="2cm">
...@@ -734,13 +734,52 @@ Added Linux driver description ...@@ -734,13 +734,52 @@ Added Linux driver description
</cell> </cell>
</row> </row>
<row> <row>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none"> <cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
\begin_inset Text \begin_inset Text
\begin_layout Plain Layout \begin_layout Plain Layout
2.1.1 2.1.1
\end_layout \end_layout
\end_inset
</cell>
<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
Ondrej Ille
\end_layout
\end_inset
</cell>
<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
12-2018
\end_layout
\end_inset
</cell>
<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
Added Register map block diagram after re-implementation of registers via
Register map generator.
\end_layout
\end_inset
</cell>
</row>
<row>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
2.1.2
\end_layout
\end_inset \end_inset
</cell> </cell>
<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none"> <cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
...@@ -765,8 +804,8 @@ Ondrej Ille ...@@ -765,8 +804,8 @@ Ondrej Ille
\begin_inset Text \begin_inset Text
\begin_layout Plain Layout \begin_layout Plain Layout
Added Register map block diagram after re-implementation of registers via Added CRC Wrapper.
Register map generator. Extended CRC description.
\end_layout \end_layout
\end_inset \end_inset
...@@ -4949,7 +4988,7 @@ PH2, PH2 FD ...@@ -4949,7 +4988,7 @@ PH2, PH2 FD
\begin_inset Text \begin_inset Text
\begin_layout Plain Layout \begin_layout Plain Layout
4 -
\end_layout \end_layout
\end_inset \end_inset
...@@ -4996,7 +5035,7 @@ PH1 + PROP FD ...@@ -4996,7 +5035,7 @@ PH1 + PROP FD
\begin_inset Text \begin_inset Text
\begin_layout Plain Layout \begin_layout Plain Layout
2 -
\end_layout \end_layout
\end_inset \end_inset
...@@ -5456,7 +5495,7 @@ CAN Core ...@@ -5456,7 +5495,7 @@ CAN Core
\end_layout \end_layout
\begin_layout Description \begin_layout Description
File core_top.vhd File can_core.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
...@@ -5464,14 +5503,14 @@ Used ...@@ -5464,14 +5503,14 @@ Used
\begin_inset space ~ \begin_inset space ~
\end_inset \end_inset
in CAN_top_level.vhd in can_top_level.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
Entity Entity
\family roman \family roman
\shape italic \shape italic
core_top can_core
\end_layout \end_layout
\begin_layout Standard \begin_layout Standard
...@@ -5732,7 +5771,7 @@ name "subsec-Protocol-Control" ...@@ -5732,7 +5771,7 @@ name "subsec-Protocol-Control"
\end_layout \end_layout
\begin_layout Description \begin_layout Description
File protocolControl.vhd File protocol_control.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
...@@ -5740,14 +5779,14 @@ Used ...@@ -5740,14 +5779,14 @@ Used
\begin_inset space ~ \begin_inset space ~
\end_inset \end_inset
in core_top.vhd in can_core.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
Entity Entity
\family roman \family roman
\shape italic \shape italic
protocolControl protocol_control
\end_layout \end_layout
\begin_layout Standard \begin_layout Standard
...@@ -9284,7 +9323,7 @@ name "subsec-Operation-control" ...@@ -9284,7 +9323,7 @@ name "subsec-Operation-control"
\end_layout \end_layout
\begin_layout Description \begin_layout Description
File operationControl.vhd File operation_control.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
...@@ -9292,14 +9331,14 @@ Used ...@@ -9292,14 +9331,14 @@ Used
\begin_inset space ~ \begin_inset space ~
\end_inset \end_inset
in core_top.vhd in can_core.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
Entity Entity
\family roman \family roman
\shape italic \shape italic
operationControl operation_control
\end_layout \end_layout
\begin_layout Standard \begin_layout Standard
...@@ -9524,7 +9563,7 @@ name "fig:OP_control" ...@@ -9524,7 +9563,7 @@ name "fig:OP_control"
\end_layout \end_layout
\begin_layout Description \begin_layout Description
File faultConf.vhd File fault_confinement.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
...@@ -9532,14 +9571,11 @@ Used ...@@ -9532,14 +9571,11 @@ Used
\begin_inset space ~ \begin_inset space ~
\end_inset \end_inset
in core_top.vhd in can_core.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
Entity Entity fault_confinement
\family roman
\shape italic
faultConf
\end_layout \end_layout
\begin_layout Standard \begin_layout Standard
...@@ -9821,7 +9857,7 @@ name "fig:Fault-block-diagram" ...@@ -9821,7 +9857,7 @@ name "fig:Fault-block-diagram"
\end_layout \end_layout
\begin_layout Description \begin_layout Description
File bitStuffing_v2.vhd File bit_stuffing.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
...@@ -9829,14 +9865,14 @@ Used ...@@ -9829,14 +9865,14 @@ Used
\begin_inset space ~ \begin_inset space ~
\end_inset \end_inset
in core_top.vhd in can_core.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
Entity Entity
\family roman \family roman
\shape italic \shape italic
bitStuffing bit_stuffing
\end_layout \end_layout
\begin_layout Standard \begin_layout Standard
...@@ -10016,7 +10052,7 @@ name "fig:Bit-stuffing-logic" ...@@ -10016,7 +10052,7 @@ name "fig:Bit-stuffing-logic"
\end_layout \end_layout
\begin_layout Description \begin_layout Description
File bitDestuffing.vhd File bit_destuffing.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
...@@ -10024,14 +10060,14 @@ Used ...@@ -10024,14 +10060,14 @@ Used
\begin_inset space ~ \begin_inset space ~
\end_inset \end_inset
in core_top.vhd in can_core.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
Entity Entity
\family roman \family roman
\shape italic \shape italic
bitDestuffing bit_destuffing
\end_layout \end_layout
\begin_layout Standard \begin_layout Standard
...@@ -10232,7 +10268,7 @@ name "subsec-CRC" ...@@ -10232,7 +10268,7 @@ name "subsec-CRC"
\end_layout \end_layout
\begin_layout Description \begin_layout Description
File CRC.vhd File crc_wrapper.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
...@@ -10240,14 +10276,14 @@ Used ...@@ -10240,14 +10276,14 @@ Used
\begin_inset space ~ \begin_inset space ~
\end_inset \end_inset
in core_top.vhd in can_core.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
Entity Entity
\family roman \family roman
\shape italic \shape italic
canCRC crc_wrapper
\end_layout \end_layout
\begin_layout Standard \begin_layout Standard
...@@ -10260,44 +10296,88 @@ literal "true" ...@@ -10260,44 +10296,88 @@ literal "true"
\end_inset \end_inset
. .
Circuit operation is started upon detection of 0 to 1 transition on Calculation is implemented in
\family roman \family roman
\shape italic \shape italic
enable crc_calc
\family default \family default
\shape default \shape default
input. module.
Input data are processed with Single CRC module (
\family roman \family roman
\shape italic \shape italic
trig can_crc
\family default \family default
\shape default \shape default
input signal. entity) calculates all three CRCs required for CAN protocol (with 15, 17
After finishing the calculation, CRC value remains valid until next 0 to and 21 bits long polynomials).
1 transition on CRC wrapper contains 4 instances of CRC modules, thus together there are
12 CRC sequences calculated simultaneously.
CRC wrapper further-more contains two stage multiplexor (
\family roman
\shape italic
crc_mux
\family default
\shape default
) which multiplexes between 4 calculated CRC combinationally by
\family roman
\shape italic
use_rx_crc
\family default
\shape default
,
\family roman
\shape italic
use_wbs_crc
\family default
\shape default
signals.
Architecture of CRC wrapper module is shown in Figure
\begin_inset CommandInset ref
LatexCommand ref
reference "fig:crc-block"
plural "false"
caps "false"
noprefix "false"
\end_inset
.
\end_layout
\begin_layout Standard
Operation of
\family roman
\shape italic
crc_calc
\family default
\shape default
is started upon detection of 0 to 1 transition on
\family roman \family roman
\shape italic \shape italic
enable enable
\family default \family default
\shape default \shape default
input. input.
CRC value is calculated in shift registers Input data are processed with
\family roman \family roman
\shape italic \shape italic
crc15_reg trig
\family default \family default
\shape default \shape default
, input signal.
After finishing the calculation, CRC value remains valid until next 0 to
1 transition on
\family roman \family roman
\shape italic \shape italic
crc17_reg enable
\family default \family default
\shape default \shape default
, input.
CRC value is calculated in shift register
\family roman \family roman
\shape italic \shape italic
crc21_reg crc_reg
\family default \family default
\shape default \shape default
. .
...@@ -10317,23 +10397,10 @@ tion to avoid long combinational paths. ...@@ -10317,23 +10397,10 @@ tion to avoid long combinational paths.
Result CRC values are propagated to outputs Result CRC values are propagated to outputs
\family roman \family roman
\shape italic \shape italic
crc15 crc
\family default
\shape default
,
\family roman
\shape italic
crc17
\family default
\shape default
,
\family roman
\shape italic
crc21
\family default \family default
\shape default \shape default
of the circuit. of the circuit.
All three CRC values are calculated at the same time.
Since CRC calculation in ISO FD and Non-ISO are different, highest bit Since CRC calculation in ISO FD and Non-ISO are different, highest bit
of of
\family roman \family roman
...@@ -10357,6 +10424,57 @@ drv_fd_type ...@@ -10357,6 +10424,57 @@ drv_fd_type
signal which is derived from Driving Bus. signal which is derived from Driving Bus.
\end_layout \end_layout
\begin_layout Standard
\begin_inset Float figure
placement h
wide false
sideways false
status open
\begin_layout Plain Layout
\noindent
\align center
\begin_inset Graphics
filename ../pics/Visio_generated/crc_wrapper_diagram.pdf
lyxscale 20
scale 65
\end_inset
\end_layout
\begin_layout Plain Layout
\begin_inset Caption Standard
\begin_layout Plain Layout
CRC wrapper block diagram
\begin_inset CommandInset label
LatexCommand label
name "fig:crc-block"
\end_inset
\end_layout
\end_inset
\end_layout
\end_inset
\end_layout
\begin_layout Standard
\begin_inset Newpage pagebreak
\end_inset
\end_layout
\begin_layout Subsection \begin_layout Subsection
Bus Sampling Bus Sampling
\begin_inset CommandInset label \begin_inset CommandInset label
...@@ -10369,7 +10487,7 @@ name "subsec-Bus-Sampling" ...@@ -10369,7 +10487,7 @@ name "subsec-Bus-Sampling"
\end_layout \end_layout
\begin_layout Description \begin_layout Description
File busSync.vhd File bus_sampling.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
...@@ -10377,14 +10495,14 @@ Used ...@@ -10377,14 +10495,14 @@ Used
\begin_inset space ~ \begin_inset space ~
\end_inset \end_inset
in CAN_top_level.vhd in can_top_level.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
Entity Entity
\family roman \family roman
\shape italic \shape italic
busSync bus_sampling
\end_layout \end_layout
\begin_layout Standard \begin_layout Standard
...@@ -10777,7 +10895,7 @@ Interrupt Manager ...@@ -10777,7 +10895,7 @@ Interrupt Manager
\end_layout \end_layout
\begin_layout Description \begin_layout Description
File intManager.vhd File interrupt_manager.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
...@@ -10785,14 +10903,14 @@ Used ...@@ -10785,14 +10903,14 @@ Used
\begin_inset space ~ \begin_inset space ~
\end_inset \end_inset
in CAN_top_level.vhd in can_top_level.vhd
\end_layout \end_layout
\begin_layout Description \begin_layout Description
Entity