Skip to content
GitLab
Projects
Groups
Snippets
Help
Loading...
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
C
CTU CAN FD IP Core
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
14
Issues
14
List
Boards
Labels
Service Desk
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Operations
Operations
Incidents
Environments
Packages & Registries
Packages & Registries
Container Registry
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
canbus
CTU CAN FD IP Core
Commits
1cdb95ac
Commit
1cdb95ac
authored
Mar 06, 2020
by
Ille, Ondrej, Ing.
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
reg.map: Use updated register map generator for reg.map generation.
parent
19e75e47
Changes
2
Expand all
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
148 additions
and
218 deletions
+148
-218
scripts/pyXact_generator
scripts/pyXact_generator
+1
-1
src/memory_registers/generated/control_registers_reg_map.vhd
src/memory_registers/generated/control_registers_reg_map.vhd
+147
-217
No files found.
pyXact_generator
@
739fbf85
Compare
58c058cc
...
739fbf85
Subproject commit
58c058cc9103b259a10a50406454fe978171f646
Subproject commit
739fbf8557d5d04f276836e3fbf6ae17aecdead0
src/memory_registers/generated/control_registers_reg_map.vhd
View file @
1cdb95ac
This diff is collapsed.
Click to expand it.
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
.
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment