Merge branch '282-add-register-list-to-the-reg-map' into 'master'

src: Add array of register to allow iterating over registers.

Closes #282

See merge request !239

pyXact_generator @ 4e78535d

-Subproject commit d0d572b431887051295461eb5aa2c78736f7b10a
+Subproject commit 4e78535d62f76ae5a0b91819ab6cbb914cba4662

src/lib/can_fd_frame_format.vhd

@@ -49,6 +49,25 @@ use ieee.std_logic_1164.all;
 
 package can_fd_frame_format is
 
+  ------------------------------------------------------------------------------
+  -- Common types
+  ------------------------------------------------------------------------------
+  type t_reg_type is (
+    reg_none,
+    reg_write_only,
+    reg_read_only,
+    reg_read_write,
+    reg_read_write_once
+  );
+
+  type t_reg is record
+       address       : std_logic_vector(11 downto 0);
+       size                                : integer;
+       reg_type                         : t_reg_type;
+       reset_val     : std_logic_vector(31 downto 0);
+  end record;
+
+
   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
   -- Address block: CAN_FD_Frame_format
@@ -64,6 +83,44 @@ package can_fd_frame_format is
   constant DATA_5_8_W_ADR            : std_logic_vector(11 downto 0) := x"014";
   constant DATA_61_64_W_ADR          : std_logic_vector(11 downto 0) := x"04C";
 
+  ------------------------------------------------------------------------------
+  -- Register list
+  ------------------------------------------------------------------------------
+
+  type t_CAN_FD_Frame_format_list is array (0 to 6) of t_reg;
+
+  constant CAN_FD_Frame_format_list : t_CAN_FD_Frame_format_list :=(
+
+    (address   => FRAME_FORM_W_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => IDENTIFIER_W_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TIMESTAMP_L_W_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TIMESTAMP_U_W_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => DATA_1_4_W_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => DATA_5_8_W_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => DATA_61_64_W_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000")
+  );
+
   ------------------------------------------------------------------------------
   -- FRAME_FORM_W register
   --

src/lib/can_fd_register_map.vhd

@@ -49,6 +49,25 @@ use ieee.std_logic_1164.all;
 
 package can_fd_register_map is
 
+  ------------------------------------------------------------------------------
+  -- Common types
+  ------------------------------------------------------------------------------
+  type t_reg_type is (
+    reg_none,
+    reg_write_only,
+    reg_read_only,
+    reg_read_write,
+    reg_read_write_once
+  );
+
+  type t_reg is record
+       address       : std_logic_vector(11 downto 0);
+       size                                : integer;
+       reg_type                         : t_reg_type;
+       reset_val     : std_logic_vector(31 downto 0);
+  end record;
+
+
   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
   -- Address block: Control_registers
@@ -106,6 +125,212 @@ package can_fd_register_map is
   constant TIMESTAMP_LOW_ADR         : std_logic_vector(11 downto 0) := x"094";
   constant TIMESTAMP_HIGH_ADR        : std_logic_vector(11 downto 0) := x"098";
 
+  ------------------------------------------------------------------------------
+  -- Register list
+  ------------------------------------------------------------------------------
+
+  type t_Control_registers_list is array (0 to 48) of t_reg;
+
+  constant Control_registers_list : t_Control_registers_list :=(
+
+    (address   => DEVICE_ID_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000001100101011111101"),
+    (address   => VERSION_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => MODE_ADR,
+     size      => 16,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000110000"),
+    (address   => SETTINGS_ADR,
+     size      => 16,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => STATUS_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000010000000"),
+    (address   => COMMAND_ADR,
+     size      => 32,
+     reg_type  => reg_write_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => INT_STAT_ADR,
+     size      => 16,
+     reg_type  => reg_read_write_once,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => INT_ENA_SET_ADR,
+     size      => 16,
+     reg_type  => reg_read_write_once,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => INT_ENA_CLR_ADR,
+     size      => 16,
+     reg_type  => reg_write_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => INT_MASK_SET_ADR,
+     size      => 16,
+     reg_type  => reg_read_write_once,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => INT_MASK_CLR_ADR,
+     size      => 16,
+     reg_type  => reg_write_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => BTR_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00010000010100001010000110000101"),
+    (address   => BTR_FD_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00010000001000000110000110000011"),
+    (address   => EWL_ADR,
+     size      => 8,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000001100000"),
+    (address   => ERP_ADR,
+     size      => 8,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000001000000000000000"),
+    (address   => FAULT_STATE_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000010000000000000000"),
+    (address   => RXC_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TXC_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => ERR_NORM_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => ERR_FD_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => CTR_PRES_ADR,
+     size      => 32,
+     reg_type  => reg_write_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => FILTER_A_MASK_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => FILTER_A_VAL_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => FILTER_B_MASK_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => FILTER_B_VAL_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => FILTER_C_MASK_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => FILTER_C_VAL_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => FILTER_RAN_LOW_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => FILTER_RAN_HIGH_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => FILTER_CONTROL_ADR,
+     size      => 16,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000001111"),
+    (address   => FILTER_STATUS_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => RX_MEM_INFO_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => RX_POINTERS_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => RX_STATUS_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000011"),
+    (address   => RX_SETTINGS_ADR,
+     size      => 8,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => RX_DATA_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TX_STATUS_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000001000100010001000"),
+    (address   => TX_COMMAND_ADR,
+     size      => 16,
+     reg_type  => reg_write_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TX_PRIORITY_ADR,
+     size      => 16,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000001"),
+    (address   => ERR_CAPT_ADR,
+     size      => 8,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000011111"),
+    (address   => ALC_ADR,
+     size      => 8,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TRV_DELAY_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => SSP_CFG_ADR,
+     size      => 16,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => RX_COUNTER_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TX_COUNTER_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => DEBUG_REGISTER_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => YOLO_REG_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "11011110101011011011111011101111"),
+    (address   => TIMESTAMP_LOW_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TIMESTAMP_HIGH_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000")
+  );
+
   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
   -- Address block: TX_Buffer_1
@@ -117,6 +342,28 @@ package can_fd_register_map is
   constant TXTB1_DATA_2_ADR          : std_logic_vector(11 downto 0) := x"104";
   constant TXTB1_DATA_20_ADR         : std_logic_vector(11 downto 0) := x"14C";
 
+  ------------------------------------------------------------------------------
+  -- Register list
+  ------------------------------------------------------------------------------
+
+  type t_TX_Buffer_1_list is array (0 to 2) of t_reg;
+
+  constant TX_Buffer_1_list : t_TX_Buffer_1_list :=(
+
+    (address   => TXTB1_DATA_1_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TXTB1_DATA_2_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TXTB1_DATA_20_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000")
+  );
+
   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
   -- Address block: TX_Buffer_2
@@ -128,6 +375,28 @@ package can_fd_register_map is
   constant TXTB2_DATA_2_ADR          : std_logic_vector(11 downto 0) := x"204";
   constant TXTB2_DATA_20_ADR         : std_logic_vector(11 downto 0) := x"24C";
 
+  ------------------------------------------------------------------------------
+  -- Register list
+  ------------------------------------------------------------------------------
+
+  type t_TX_Buffer_2_list is array (0 to 2) of t_reg;
+
+  constant TX_Buffer_2_list : t_TX_Buffer_2_list :=(
+
+    (address   => TXTB2_DATA_1_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TXTB2_DATA_2_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TXTB2_DATA_20_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000")
+  );
+
   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
   -- Address block: TX_Buffer_3
@@ -139,6 +408,28 @@ package can_fd_register_map is
   constant TXTB3_DATA_2_ADR          : std_logic_vector(11 downto 0) := x"304";
   constant TXTB3_DATA_20_ADR         : std_logic_vector(11 downto 0) := x"34C";
 
+  ------------------------------------------------------------------------------
+  -- Register list
+  ------------------------------------------------------------------------------
+
+  type t_TX_Buffer_3_list is array (0 to 2) of t_reg;
+
+  constant TX_Buffer_3_list : t_TX_Buffer_3_list :=(
+
+    (address   => TXTB3_DATA_1_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TXTB3_DATA_2_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TXTB3_DATA_20_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000")
+  );
+
   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
   -- Address block: TX_Buffer_4
@@ -150,6 +441,28 @@ package can_fd_register_map is
   constant TXTB4_DATA_2_ADR          : std_logic_vector(11 downto 0) := x"404";
   constant TXTB4_DATA_20_ADR         : std_logic_vector(11 downto 0) := x"44C";
 
+  ------------------------------------------------------------------------------
+  -- Register list
+  ------------------------------------------------------------------------------
+
+  type t_TX_Buffer_4_list is array (0 to 2) of t_reg;
+
+  constant TX_Buffer_4_list : t_TX_Buffer_4_list :=(
+
+    (address   => TXTB4_DATA_1_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TXTB4_DATA_2_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => TXTB4_DATA_20_ADR,
+     size      => 32,
+     reg_type  => reg_none,
+     reset_val => "00000000000000000000000000000000")
+  );
+
   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
   -- Address block: Event_Logger
@@ -165,6 +478,44 @@ package can_fd_register_map is
   constant LOG_CAPT_EVENT_1_ADR      : std_logic_vector(11 downto 0) := x"510";
   constant LOG_CAPT_EVENT_2_ADR      : std_logic_vector(11 downto 0) := x"514";
 
+  ------------------------------------------------------------------------------
+  -- Register list
+  ------------------------------------------------------------------------------
+
+  type t_Event_Logger_list is array (0 to 6) of t_reg;
+
+  constant Event_Logger_list : t_Event_Logger_list :=(
+
+    (address   => LOG_TRIG_CONFIG_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => LOG_CAPT_CONFIG_ADR,
+     size      => 32,
+     reg_type  => reg_read_write,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => LOG_STATUS_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000001"),
+    (address   => LOG_POINTERS_ADR,
+     size      => 16,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => LOG_COMMAND_ADR,
+     size      => 8,
+     reg_type  => reg_write_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => LOG_CAPT_EVENT_1_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000"),
+    (address   => LOG_CAPT_EVENT_2_ADR,
+     size      => 32,
+     reg_type  => reg_read_only,
+     reset_val => "00000000000000000000000000000000")
+  );
+
   ------------------------------------------------------------------------------
   -- DEVICE_ID register
   --