Commit 13453842 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

Merge branch '277-hw-tests-failing' into 'master'

Resolve "HW tests failing"

Closes #277

See merge request !235
parents fef8e8e7 5313e085
Pipeline #6696 passed with stages
in 41 minutes and 17 seconds
......@@ -64,7 +64,7 @@ use work.reduce_lib.all;
use work.CAN_FD_register_map.all;
use work.CAN_FD_frame_format.all;
entity bit_errror_detector is
entity bit_error_detector is
generic(
-- Reset polarity
constant reset_polarity : std_logic
......@@ -119,7 +119,7 @@ entity bit_errror_detector is
);
end entity;
architecture rtl of bit_errror_detector is
architecture rtl of bit_error_detector is
-- Internal sample signal (muxed for NBT, DBT and SAMPLE)
signal sample : std_logic;
......
......@@ -543,7 +543,7 @@ begin
---------------------------------------------------------------------------
-- Bit error detector
---------------------------------------------------------------------------
bit_errror_detector_comp : bit_errror_detector
bit_error_detector_comp : bit_error_detector
generic map(
reset_polarity => reset_polarity
)
......
......@@ -170,5 +170,8 @@ begin
insert_pipeline_false_gen : if (pipeline_sampled_data = false) generate
data_rx <= rx_data_i;
end generate insert_pipeline_false_gen;
-- Internal signal to output propagation
prev_sample <= sample_prev_q;
end architecture;
\ No newline at end of file
......@@ -865,7 +865,7 @@ package can_components is
);
end component;
component bit_errror_detector is
component bit_error_detector is
generic(
constant reset_polarity : std_logic
);
......
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