Commit 12fa7995 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

Changed handling of TXT Buffer HW Command Interrupt.

Added logic in TXT Buffer which fires the interrupt
only when TXT Buffer FSM is moved to one of Ok, Error,
Aborted States!
parent d8dd3bc1
......@@ -68,6 +68,9 @@
-- progress" states.
-- 06.4.2018 Changed output from side of CAN Core to synchronous. Async.
-- output did not allow inferrence of RAM in Altera FPGA.
-- 30.8.2018 Added "txt_hw_cmd_int" output for Interrupt Manager. TXTB HW
-- command Interrupt generated upon move to Done, Failed or
-- Aborted states.
--------------------------------------------------------------------------------
Library ieee;
......@@ -106,6 +109,11 @@ entity txtBuffer is
------------------------------------------------------------------------
signal txtb_state :out txt_fsm_type;
------------------------------------------------------------------------
-- Interrupt Manager
------------------------------------------------------------------------
signal txt_hw_cmd_int :out std_logic;
------------------------------------------------------------------------
-- CAN Core and TX Arbiter Interface
------------------------------------------------------------------------
......@@ -171,6 +179,13 @@ begin
sw_cbs <= '1' when txt_sw_buf_cmd_index(ID) = '1'
else
'0';
-- TXT Buffer HW Command generates interrupt upon transition to
-- Failed, Done and Aborted states!
txt_hw_cmd_int <= hw_cbs and (txt_hw_cmd.failed = '1' or
txt_hw_cmd.valid = '1' or
(txt_hw_cmd.unlock = '1' and
buf_fsm = txt_ab_prog);
-- Connect internal buffer state to output
txtb_state <= buf_fsm;
......@@ -259,7 +274,7 @@ begin
--------------------------------------------------------------------
-- Transmission from buffer is in progress
--------------------------------------------------------------------
--------------------------------------------------------------------
when txt_tx_prog =>
-- Unlock the buffer
......
......@@ -287,6 +287,9 @@ entity CAN_top_level is
-- Hardware commands to TXT Buffer from Protocol control
signal txt_hw_cmd : txt_hw_cmd_type;
-- TXT Buffer HW CMD Interrupt activated on TXT Buffer
signal txt_hw_cmd_int : std_logic_vector(TXT_BUFFER_COUNT - 1);
-- Hardware command index set by TX Arbitrator based on the current
-- internal state
signal txt_hw_cmd_index : natural range 0 to TXT_BUFFER_COUNT - 1;
......@@ -597,6 +600,7 @@ begin
txt_sw_buf_cmd_index => txt_buf_cmd_index,
txtb_state => txtb_fsms(i),
txt_hw_cmd => txt_hw_cmd,
txt_hw_cmd_int => txt_hw_cmd_int(i),
txt_hw_cmd_buf_index => txt_hw_cmd_buf_index,
bus_off_start => bus_off_start,
txt_word => txt_word(i),
......@@ -683,7 +687,7 @@ begin
rec_message_valid => rec_message_valid,
rx_full => rx_full,
rx_empty => rx_empty,
txt_hw_cmd => txt_hw_cmd,
txt_hw_cmd_int => txt_hw_cmd_int,
loger_finished => loger_finished,
drv_bus => drv_bus,
int_out => int,
......
......@@ -59,11 +59,16 @@
-- be level based instead of edge based with fixed duration. This
-- is more fitting for SocketCAN implementation.
-- 12.3.2018 Implemented RX Buffer not empty and TX Buffer HW command INT.
-- 30.8.2018 Moved HW command detection logic to TXT Buffer from here.
-- Thus TXT Buffer can properly filter commands, to avoid
-- overflow of interrupts! Replaced "txt_hw_cmd" with
-- "txt_hw_cmd_int" signal.
--------------------------------------------------------------------------------
Library ieee;
USE IEEE.std_logic_1164.all;
USE IEEE.numeric_std.ALL;
use ieee.std_logic_misc.all;
USE WORK.CANconstants.ALL;
use work.CAN_FD_register_map.all;
......@@ -114,8 +119,9 @@ entity intManager is
-- Recieve buffer is empty
signal rx_empty :in std_logic;
-- HW commands on TXT Buffer
signal txt_hw_cmd :in txt_hw_cmd_type;
-- HW command on TXT Buffers interrupt
signal txt_hw_cmd_int :in std_logic_vector(TXT_BUFFER_COUNT - 1
downto 0);
-- Event logger
signal loger_finished :in std_logic; --Event logging finsihed
......@@ -210,10 +216,7 @@ begin
int_input_active(RFI_IND) <= rx_full;
int_input_active(BSI_IND) <= br_shifted;
int_input_active(RBNEI_IND) <= not rx_empty;
int_input_active(TXBHCI_IND) <= '1' when (txt_hw_cmd.lock = '1' or
txt_hw_cmd.unlock = '1')
else
'0';
int_input_active(TXBHCI_IND) <= or_reduce(txt_hw_cmd_int);
int_proc : process(res_n, clk_sys)
begin
......
......@@ -228,7 +228,7 @@ package CANcomponents is
signal tran_addr :in std_logic_vector(4 downto 0);
signal tran_cs :in std_logic;
signal txt_sw_cmd :in txt_sw_cmd_type;
signal txt_hw_cmd_int :out std_logic;
signal txt_sw_buf_cmd_index :in std_logic_vector(
buf_count - 1 downto 0);
......@@ -337,7 +337,8 @@ package CANcomponents is
signal rec_message_valid :in std_logic;
signal rx_full :in std_logic;
signal rx_empty :in std_logic;
signal txt_hw_cmd :in txt_hw_cmd_type;
signal txt_hw_cmd_int :in std_logic_vector(TXT_BUFFER_COUNT - 1
downto 0);
signal loger_finished :in std_logic;
signal drv_bus :in std_logic_vector(1023 downto 0);
signal int_out :out std_logic;
......
......@@ -54,6 +54,7 @@ Library ieee;
USE IEEE.std_logic_1164.all;
USE IEEE.numeric_std.ALL;
USE ieee.math_real.ALL;
use ieee.std_logic_misc.all;
use work.CANconstants.all;
use work.CANcomponents.ALL;
USE work.CANtestLib.All;
......@@ -106,7 +107,8 @@ architecture int_man_unit_test of CAN_test is
signal rx_empty : std_logic := '1';
-- HW command on TX Buffer
signal txt_hw_cmd : txt_hw_cmd_type;
signal txt_hw_cmd_int : std_logic_vector(TXT_BUFFER_COUNT - 1
downto 0);
----------------------------------------------
-- Status signals
......@@ -194,8 +196,10 @@ architecture int_man_unit_test of CAN_test is
signal rx_empty :inout std_logic;
-- TXT HW Command
signal txt_hw_cmd :inout txt_hw_cmd_type
signal txt_hw_cmd_int :inout std_logic_vector(TXT_BUFFER_COUNT - 1
downto 0);
)is
variable tmp : std_logic;
begin
if (error_valid = '1') then
rand_logic_s(rand_ctr, error_valid, 0.85);
......@@ -263,17 +267,14 @@ architecture int_man_unit_test of CAN_test is
rand_logic_s(rand_ctr, rx_empty, 0.05);
end if;
if (txt_hw_cmd.lock = '1') then
rand_logic_s(rand_ctr, txt_hw_cmd.lock, 0.95);
else
rand_logic_s(rand_ctr, txt_hw_cmd.lock, 0.05);
end if;
if (txt_hw_cmd.lock = '1') then
rand_logic_s(rand_ctr, txt_hw_cmd.unlock, 0.95);
else
rand_logic_s(rand_ctr, txt_hw_cmd.unlock, 0.05);
end if;
for i in 0 to TXT_BUFFER_COUNT - 1 loop
if (txt_hw_cmd_int(i) = '1') then
rand_logic_v(rand_ctr, tmp, 0.95);
else
rand_logic_v(rand_ctr, tmp, 0.05);
end if;
txt_hw_cmd_int(i) <= tmp;
end loop;
end procedure;
......@@ -342,7 +343,7 @@ begin
tx_finished => tx_finished ,
br_shifted => br_shifted,
rx_empty => rx_empty,
txt_hw_cmd => txt_hw_cmd,
txt_hw_cmd_int => txt_hw_cmd_int,
rx_message_disc => rx_message_disc ,
rec_message_valid => rec_message_valid ,
rx_full => rx_full,
......@@ -366,7 +367,7 @@ begin
int_input(RFI_IND) <= rx_full;
int_input(BSI_IND) <= br_shifted;
int_input(RBNEI_IND) <= not rx_empty;
int_input(TXBHCI_IND) <= txt_hw_cmd.lock or txt_hw_cmd.unlock;
int_input(TXBHCI_IND) <= or_reduce(txt_hw_cmd_int);
----------------------------------------------------------------------------
......@@ -391,7 +392,7 @@ begin
generate_sources(rand_ctr_1, error_valid, error_passive_changed ,
error_warning_limit , arbitration_lost, tx_finished,
br_shifted, rx_message_disc , rec_message_valid ,
rx_full , loger_finished, rx_empty, txt_hw_cmd );
rx_full , loger_finished, rx_empty, txt_hw_cmd_int);
end loop;
end process;
......
......@@ -92,6 +92,8 @@ architecture tx_buf_unit_test of CAN_test is
-- Commands from the CAN Core for manipulation of the CAN
signal txt_hw_cmd : txt_hw_cmd_type :=
('0', '0', '0', '0', '0', '0');
signal txt_hw_cmd_int : std_logic;
signal txt_hw_cmd_buf_index : natural range 0 to 3;
-- Buffer output and pointer to the RAM memory
......@@ -225,6 +227,7 @@ begin
txt_sw_buf_cmd_index => txt_sw_buf_cmd_index,
txtb_state => txtb_state,
txt_hw_cmd => txt_hw_cmd,
txt_hw_cmd_int => txt_hw_cmd_int,
txt_hw_cmd_buf_index => txt_hw_cmd_buf_index,
bus_off_start => bus_off_start,
txt_word => txt_word,
......
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