TXCE Activates "set_empty" command. Transits frone TX Done, TX Error or TX Aborted to Done. Does not have any effect in other states.
TXCE Activates "set_empty" command. Transits from TX OK, TX failed or Aborted to Empty. Does not have any effect in other states.
\end_layout
\end_layout
\begin_layout Description
\begin_layout Description
TXCR Activates "set_ready" command. Transits frone TX Done, TX Error, TX Aborted or Empty to Ready. Does not have any effect in other states.
TXCR Activates "set_ready" command. Transits frone TX OK, TX failed, Aborted or Empty to Ready. Does not have any effect in other states.
\end_layout
\end_layout
\begin_layout Description
\begin_layout Description
TXCA Activates "set_abort" command. Transits from Ready to TX Aborted. If transmission is in progress (state TX in Progress) from the buffer, transits to TX Aborted if current transmission is not succesfull. If the transmission is sucesfull, it has no effect. Does not have any effect in other states.
TXCA Activates "set_abort" command. Transits from Ready to Aborted. If transmission is in progress (state TX in Progress) from the buffer, transits to Abort in progress. Upon following error frame or arbitration lost, buffer will move to Aborted. Does not have any effect in other states.
<ipxact:description>Activates "set_empty" command. Transits frone TX Done, TX Error or TX Aborted to Done. Does not have any effect in other states.</ipxact:description>
<ipxact:description>Activates "set_empty" command. Transits from TX OK, TX failed or Aborted to Empty. Does not have any effect in other states.</ipxact:description>
<ipxact:bitOffset>0</ipxact:bitOffset>
<ipxact:bitOffset>0</ipxact:bitOffset>
<ipxact:resets>
<ipxact:resets>
<ipxact:reset>
<ipxact:reset>
...
@@ -1279,7 +1279,7 @@
...
@@ -1279,7 +1279,7 @@
<ipxact:field>
<ipxact:field>
<ipxact:name>TXCR</ipxact:name>
<ipxact:name>TXCR</ipxact:name>
<ipxact:displayName>TXCR</ipxact:displayName>
<ipxact:displayName>TXCR</ipxact:displayName>
<ipxact:description>Activates "set_ready" command. Transits frone TX Done, TX Error, TX Aborted or Empty to Ready. Does not have any effect in other states.</ipxact:description>
<ipxact:description>Activates "set_ready" command. Transits frone TX OK, TX failed, Aborted or Empty to Ready. Does not have any effect in other states.</ipxact:description>
<ipxact:bitOffset>1</ipxact:bitOffset>
<ipxact:bitOffset>1</ipxact:bitOffset>
<ipxact:resets>
<ipxact:resets>
<ipxact:reset>
<ipxact:reset>
...
@@ -1292,7 +1292,7 @@
...
@@ -1292,7 +1292,7 @@
<ipxact:field>
<ipxact:field>
<ipxact:name>TXCA</ipxact:name>
<ipxact:name>TXCA</ipxact:name>
<ipxact:displayName>TXCA</ipxact:displayName>
<ipxact:displayName>TXCA</ipxact:displayName>
<ipxact:description>Activates "set_abort" command. Transits from Ready to TX Aborted. If transmission is in progress (state TX in Progress) from the buffer, transits to TX Aborted if current transmission is not succesfull. If the transmission is sucesfull, it has no effect. Does not have any effect in other states.</ipxact:description>
<ipxact:description>Activates "set_abort" command. Transits from Ready to Aborted. If transmission is in progress (state TX in Progress) from the buffer, transits to Abort in progress. Upon following error frame or arbitration lost, buffer will move to Aborted. Does not have any effect in other states.</ipxact:description>
<ipxact:regLockreg_name="CTR_PRES"lock_signal="lock_1"description="Register can be only written when MODE[TSTM] = 1, otherwise write has no effect."/>
<ipxact:regLockdescription="Register can be only written when MODE[TSTM] = 1, otherwise write has no effect."lock_signal="lock_1"reg_name="CTR_PRES"/>
<ipxact:regLockreg_name="EWL"lock_signal="lock_1"description="Register can be only written when MODE[TSTM] = 1, otherwise write has no effect."/>
<ipxact:regLockdescription="Register can be only written when MODE[TSTM] = 1, otherwise write has no effect."lock_signal="lock_1"reg_name="EWL"/>
<ipxact:regLockreg_name="ERP"lock_signal="lock_1"description="Register can be only written when MODE[TSTM] = 1, otherwise write has no effect."/>
<ipxact:regLockdescription="Register can be only written when MODE[TSTM] = 1, otherwise write has no effect."lock_signal="lock_1"reg_name="ERP"/>
<ipxact:regLockreg_name="BTR"lock_signal="lock_2"description="Register can be only written when SETTINGS[ENA] = 0, otherwise write has no effect."/>
<ipxact:regLockdescription="Register can be only written when SETTINGS[ENA] = 0, otherwise write has no effect."lock_signal="lock_2"reg_name="BTR"/>
<ipxact:regLockreg_name="BTR_FD"lock_signal="lock_2"description="Register can be only written when SETTINGS[ENA] = 0, otherwise write has no effect."/>
<ipxact:regLockdescription="Register can be only written when SETTINGS[ENA] = 0, otherwise write has no effect."lock_signal="lock_2"reg_name="BTR_FD"/>
<ipxact:regLockreg_name="SSP_CFG"lock_signal="lock_2"description="Register can be only written when SETTINGS[ENA] = 0, otherwise write has no effect."/>
<ipxact:regLockdescription="Register can be only written when SETTINGS[ENA] = 0, otherwise write has no effect."lock_signal="lock_2"reg_name="SSP_CFG"/>