Commit 0b804131 authored by Ille, Ondrej, Ing.'s avatar Ille, Ondrej, Ing.

src: Add state handling too long error and overload flags!

Now TEC/REC should be incremented by 8 after 14 dominant bits
long error flag and by 8 after each next 8 bits!
parent df46a3cf
......@@ -1233,8 +1233,19 @@ begin
when s_pc_err_delim_wait =>
if (rx_data_nbs = RECESSIVE) then
next_state <= s_pc_err_delim;
elsif (ctrl_ctr_zero = '1') then
next_state <= s_pc_err_ovr_flag_too_long;
end if;
-------------------------------------------------------------------
-- 13 dominant bits (6 Error flag + 7 Error delimiter) has been
-- detected.
-------------------------------------------------------------------
when s_pc_err_ovr_flag_too_long =>
if (rx_data_nbs = RECESSIVE) then
next_state <= s_pc_err_delim;
end if;
-------------------------------------------------------------------
-- Error delimiter
-------------------------------------------------------------------
......@@ -1261,6 +1272,8 @@ begin
when s_pc_ovr_delim_wait =>
if (rx_data_nbs = RECESSIVE) then
next_state <= s_pc_ovr_delim;
elsif (ctrl_ctr_zero = '1') then
next_state <= s_pc_err_ovr_flag_too_long;
end if;
-------------------------------------------------------------------
......@@ -2407,7 +2420,7 @@ begin
-- When waiting for RECESSIVE bit after Error flag, unit
-- may receive DOMINANT and not interpret this as Bit error!
bit_err_disable <= '1';
if (ctrl_ctr_zero = '0') then
ctrl_ctr_ena <= '1';
end if;
......@@ -2415,12 +2428,6 @@ begin
if (rx_data_nbs = RECESSIVE) then
ctrl_ctr_pload_i <= '1';
ctrl_ctr_pload_val <= C_ERR_DELIM_DURATION;
-- Err flag (6 bits) + Delimiter wait (7 bits) elapsed and
-- dominant is detected, this signals 14 consecutive dominant
-- bits!
elsif (ctrl_ctr_zero = '1') then
err_delim_late_i <= '1';
end if;
-- Node received dominant bit as first bit after Error flag!
......@@ -2429,7 +2436,31 @@ begin
primary_err_i <= '1';
first_err_delim_d <= '0';
end if;
-------------------------------------------------------------------
-- 13 dominant bits (6 error flag + 7 error delimiter) has been
-- detected (active error flag), or 7 has been detectd (passive
-- error flag).
-------------------------------------------------------------------
when s_pc_err_ovr_flag_too_long =>
is_err_frm <= '1';
err_pos <= ERC_POS_ERR;
nbt_ctrs_en <= '1';
bit_err_disable <= '1';
ctrl_ctr_ena <= '1';
if (rx_data_nbs = RECESSIVE) then
ctrl_ctr_pload_i <= '1';
ctrl_ctr_pload_val <= C_ERR_DELIM_DURATION;
-- This indicates that either 14th dominant bit was detected,
-- or each next consecutive 8 DOMINANT bits were detected!
elsif (ctrl_ctr_zero = '1') then
ctrl_ctr_pload_i <= '1';
ctrl_ctr_pload_val <= C_DOMINANT_REPEAT_DURATION;
err_delim_late_i <= '1';
end if;
-------------------------------------------------------------------
-- Error delimiter
-------------------------------------------------------------------
......@@ -2461,6 +2492,11 @@ begin
err_pos <= ERC_POS_OVRL;
nbt_ctrs_en <= '1';
if (ctrl_ctr_zero = '1') then
ctrl_ctr_pload_i <= '1';
ctrl_ctr_pload_val <= C_DELIM_WAIT_DURATION;
end if;
-------------------------------------------------------------------
-- Wait till overload delimiter.
-------------------------------------------------------------------
......@@ -2469,6 +2505,10 @@ begin
err_pos <= ERC_POS_OVRL;
nbt_ctrs_en <= '1';
if (ctrl_ctr_zero = '0') then
ctrl_ctr_ena <= '1';
end if;
-- When waiting for RECESSIVE bit after Overload flag, unit
-- may receive DOMINANT and not interpret this as Bit error!
bit_err_disable <= '1';
......
......@@ -135,5 +135,8 @@ package can_constants is
constant C_ERR_DELIM_DURATION : std_logic_vector(8 downto 0) :=
std_logic_vector(to_unsigned(6, 9));
constant C_DOMINANT_REPEAT_DURATION : std_logic_vector(8 downto 0) :=
std_logic_vector(to_unsigned(7, 9));
end package;
......@@ -108,6 +108,7 @@ package can_types is
s_pc_act_err_flag,
s_pc_pas_err_flag,
s_pc_err_delim_wait,
s_pc_err_ovr_flag_too_long,
s_pc_err_delim,
s_pc_ovr_flag,
s_pc_ovr_delim_wait,
......
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