Skip to content
  • Martin Jeřábek's avatar
    sanity_test: reimplement simulating bus delay (~17x speedup) · 80477648
    Martin Jeřábek authored
    When using valgrind's callgrind to profile the testbench, 80% of time
    was spent by updating the shift register used for bus delay.
    signal'delayed is one possibility, but it needs a static value.
    So I implemented a dynamic signal delayer using a FIFO recording
    events on signal and then replaying them on the delayed signal.
    80477648