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#LyX 2.3 created this file. For more info see http://www.lyx.org/
\lyxformat 544
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\begin_document
\begin_header
\save_transient_properties true
\origin unavailable
\textclass book
\begin_preamble
\usepackage{fancyhdr}
\pagestyle{fancy}
\usepackage{colortbl}
\definecolor{gray}{RGB}{230,230, 230}
\end_preamble
\use_default_options true
\begin_modules
customHeadersFooters
\end_modules
\maintain_unincluded_children false
\language english
\language_package default
\inputencoding auto
\fontencoding global
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\font_sans "default" "default"
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\font_sf_scale 100 100
\font_tt_scale 100 100
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\use_microtype false
\use_dash_ligatures true
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\graphics default
\default_output_format default
\output_sync 0
\bibtex_command default
\index_command default
\paperfontsize default
\spacing other 1.1
\use_hyperref true
\pdf_author "Ille Ondrej"
\pdf_subject "CAN FD IP function"
\pdf_keywords "CAN, Flexible data rate,"
\pdf_bookmarks true
\pdf_bookmarksnumbered false
\pdf_bookmarksopen false
\pdf_bookmarksopenlevel 1
\pdf_breaklinks false
\pdf_pdfborder true
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\pdf_pdfusetitle true
\papersize default
\use_geometry true
\use_package amsmath 1
\use_package amssymb 1
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\use_package esint 1
\use_package mathdots 1
\use_package mathtools 1
\use_package mhchem 1
\use_package stackrel 1
\use_package stmaryrd 1
\use_package undertilde 1
\cite_engine basic
\cite_engine_type default
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\use_indices false
\paperorientation portrait
\suppress_date false
\justification true
\use_refstyle 1
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\use_minted 0
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\index Index
\shortcut idx
\color #008000
\end_index
\leftmargin 2cm
\topmargin 3cm
\rightmargin 2cm
\bottommargin 3cm
\headheight 2cm
\secnumdepth -2
\tocdepth 5
\paragraph_separation skip
\defskip smallskip
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\is_math_indent 0
\math_numbering_side default
\quotes_style english
\dynamic_quotes 0
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\papercolumns 1
\papersides 1
\paperpagestyle headings
\tracking_changes false
\output_changes false
\html_math_output 0
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\html_be_strict false
\end_header

\begin_body
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\begin_layout Description
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Generics\end_layout
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\begin_layout Standard
\noindent
\align center
\begin_inset Tabular
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<lyxtabular columns="4" rows="11" version="3">
<features islongtable="true" longtabularalignment="center">
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<column alignment="center" valignment="top" width="4cm">
<column alignment="center" valignment="top" width="3.5cm">
<column alignment="center" valignment="top" width="1.2cm">
<column alignment="center" valignment="top" width="7cm">
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Name\begin_inset ERT
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status open
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\backslash
cellcolor{cyan}
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\end_layout

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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

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Type\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{cyan}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Default value\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{cyan}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Description\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{cyan}
\end_layout
\end_inset
\end_layout

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</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

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G_RESET_POLARITY\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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std_logic\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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'0'\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Reset polarity\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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G_TSEG1_NBT_WIDTH\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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natural\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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8\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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TSEG1 Width - Nominal Bit Time\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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G_TSEG2_NBT_WIDTH\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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natural\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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8\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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TSEG2 Width - Nominal Bit Time\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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G_BRP_NBT_WIDTH\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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natural\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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8\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Baud rate prescaler Width - Nominal Bit Time\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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G_SJW_NBT_WIDTH\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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natural\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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5\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Synchronisation Jump width Width - Nominal Bit Time\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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G_TSEG1_DBT_WIDTH\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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natural\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

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8\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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TSEG1 Width - Data Bit Time\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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G_TSEG2_DBT_WIDTH\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

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natural\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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8\end_layout
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\end_inset
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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TSEG2 Width - Data Bit Time\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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G_BRP_DBT_WIDTH\end_layout
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</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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natural\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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8\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Baud rate prescaler width - Data Bit Time\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

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G_SJW_DBT_WIDTH\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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natural\end_layout
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\end_inset
</cell>
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\begin_inset Text

\begin_layout Plain Layout
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5\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Synchronisation Jump Width width - Data Bit Time\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" bottomline="true" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

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G_SAMPLE_TRIGGER_COUNT\end_layout
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\end_inset
</cell>
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<cell alignment="center" bottomline="true" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

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natural range 2 to 8\end_layout
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\end_inset
</cell>
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<cell alignment="center" bottomline="true" leftline="true" topline="true" usebox="none" valignment="top">
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2\end_layout
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\end_inset
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<cell alignment="center" bottomline="true" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
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Number of signals in Sample trigger\end_layout
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\end_inset
</cell>
</row>
</lyxtabular>

\end_inset


\end_layout
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\begin_layout Description
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Ports\end_layout
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\begin_layout Standard
\noindent
\align center
\begin_inset Tabular
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<lyxtabular columns="4" rows="19" version="3">
<features islongtable="true" longtabularalignment="center">
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<column alignment="center" valignment="top" width="4cm">
<column alignment="center" valignment="top" width="1.2cm">
<column alignment="center" valignment="top" width="3.5cm">
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<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Name\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{cyan}
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\end_inset
\end_layout

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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
557
Direction\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{cyan}
\end_layout
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568
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
572
Type\begin_inset ERT
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status open
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cellcolor{cyan}
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583
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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Description\begin_inset ERT
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\end_inset
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<row>
600
<cell alignment="center" leftline="true" multicolumn="1" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
604
Clock and Asynchronous reset\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
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\end_inset
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615
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
619
Clock and Asynchronous reset\begin_inset ERT
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cellcolor{gray}
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\end_inset
</cell>
630
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
634
Clock and Asynchronous reset\begin_inset ERT
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cellcolor{gray}
\end_layout
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\end_layout

\end_inset
</cell>
645
<cell alignment="center" leftline="true" multicolumn="2" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
649
Clock and Asynchronous reset\begin_inset ERT
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</cell>
</row>
<row>
662
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
666
clk_sys\end_layout
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\end_inset
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670
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
674
in\end_layout
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\end_inset
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678
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
682
std_logic\end_layout
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\end_inset
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686
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
690
System clock\end_layout
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\end_inset
</cell>
</row>
<row>
696
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
700
res_n\end_layout
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\end_inset
</cell>
704
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
708
in\end_layout
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\end_inset
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712
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
716
std_logic\end_layout
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\end_inset
</cell>
720
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
724
Asynchronous reset\end_layout
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\end_inset
</cell>
</row>
<row>
730
<cell alignment="center" leftline="true" multicolumn="1" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
734
Memory registers interface\begin_inset ERT
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\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
745
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
749
Memory registers interface\begin_inset ERT
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\begin_layout Plain Layout
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\end_layout
\end_inset
\end_layout

\end_inset
</cell>
760
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
764
Memory registers interface\begin_inset ERT
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\begin_layout Plain Layout
\backslash
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\end_layout
\end_inset
\end_layout

\end_inset
</cell>
775
<cell alignment="center" leftline="true" multicolumn="2" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
779
Memory registers interface\begin_inset ERT
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cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
</row>
<row>
792
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
796
drv_bus\end_layout
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\end_inset
</cell>
800
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
804
in\end_layout
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\end_inset
</cell>
808
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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809 810 811 812 813 814 815
\begin_inset Text

\begin_layout Plain Layout
std_logic_vector 
\begin_inset Newline newline
\end_inset

816
(1023 downto 0)\end_layout
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\end_inset
</cell>
820
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
824
Driving Bus\end_layout
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\end_inset
</cell>
</row>
<row>
830
<cell alignment="center" leftline="true" multicolumn="1" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
834
Control Interface\begin_inset ERT
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\begin_layout Plain Layout
\backslash
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\end_layout
\end_inset
\end_layout

\end_inset
</cell>
845
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
849
Control Interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
860
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
864
Control Interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
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\end_layout
\end_inset
\end_layout

\end_inset
</cell>
875
<cell alignment="center" leftline="true" multicolumn="2" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
879
Control Interface\begin_inset ERT
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status open
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cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
</row>
<row>
892
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
896
sync_edge\end_layout
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\end_inset
</cell>
900
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
904
in\end_layout
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\end_inset
</cell>
908
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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909 910 911
\begin_inset Text

\begin_layout Plain Layout
912
std_logic\end_layout
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\end_inset
</cell>
916
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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917 918 919
\begin_inset Text

\begin_layout Plain Layout
920
Synchronisation edge (from Bus sampling)\end_layout
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\end_inset
</cell>
</row>
<row>
926
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
930
sp_control\end_layout
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\end_inset
</cell>
934
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
938
in\end_layout
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\end_inset
</cell>
942
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
std_logic_vector 
\begin_inset Newline newline
\end_inset

950
(1 downto 0)\end_layout
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951 952 953

\end_inset
</cell>
954
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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955 956 957
\begin_inset Text

\begin_layout Plain Layout
958
Sample control (Nominal, Data, Secondary)\end_layout
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\end_inset
</cell>
</row>
<row>
964
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
968
sync_control\end_layout
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\end_inset
</cell>
972
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
976
in\end_layout
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\end_inset
</cell>
980
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
std_logic_vector 
\begin_inset Newline newline
\end_inset

988
(1 downto 0)\end_layout
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989 990 991

\end_inset
</cell>
992
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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993 994 995
\begin_inset Text

\begin_layout Plain Layout
996
Synchronisation control (No synchronisation, Hard Synchronisation,Resynchronisation\end_layout
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997 998 999 1000 1001

\end_inset
</cell>
</row>
<row>
1002
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1006
no_pos_resync\end_layout
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1007 1008 1009

\end_inset
</cell>
1010
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1014
in\end_layout
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\end_inset
</cell>
1018
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1022
std_logic\end_layout
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1023 1024 1025

\end_inset
</cell>
1026
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1030
No re-synchronisation should be executed due to positive phaseerror\end_layout
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1031

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\end_inset
</cell>
</row>
<row>
1036
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1040
nbt_ctrs_en\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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in\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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std_logic\end_layout
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\end_inset
</cell>
1060
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1064
Enable Nominal Bit time counters.\end_layout
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\end_inset
</cell>
</row>
<row>
1070
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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dbt_ctrs_en\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1082
in\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout